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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [devs/] [can/] [arm/] [lpc2xxx/] [current/] [include/] [can_lpc2xxx_baudrates.h] - Blame information for rev 856

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#ifndef CYGONCE_CAN_LPC2XXX_BAUDRATES_H
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#define CYGONCE_CAN_LPC2XXX_BAUDRATES_H
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//==========================================================================
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//
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//      devs/can/arm/lpc2xxx/current/include/can_lpc2xxx_baudrates.h
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//
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//      Precalculated values for bit timing register
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//
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//==========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    Uwe Kindler
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// Contributors: Uwe Kindler
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// Date:         2007-07-01
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// Purpose:      Precalculated bit timing values for various baudrates
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// Description: 
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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//
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// Macro for creation of CAN_BR value for baudrate tbl
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//
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#define CAN_BR_TBL_ENTRY(_brp_, _tseg1_, _tseg2_, _sjw_, _sam_) \
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   ((_sam_ << 23) | (_tseg2_ << 20) | (_tseg1_ << 16) | (_sjw_ << 14) | (_brp_))
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#ifndef CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK
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#error "CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK not defined"
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#endif
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//==========================================================================
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//                             BAUDRATES
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//==========================================================================
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#if CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 60000000
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//
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// Table with register values for baudrates at peripheral clock of 60 MHz
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//
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static const cyg_uint32 lpc2xxx_br_tbl[] =
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{
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    CAN_BR_TBL_ENTRY(300, 15, 2, 0, 1), // 10  kbaud
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    CAN_BR_TBL_ENTRY(150, 15, 2, 0, 1), // 20  kbaud
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    CAN_BR_TBL_ENTRY(59,  15, 2, 0, 1), // 50  kbaud
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    CAN_BR_TBL_ENTRY(39,  11, 1, 0, 1), // 100 kbaud
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    CAN_BR_TBL_ENTRY(29,  12, 1, 0, 1), // 125 kbaud
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    CAN_BR_TBL_ENTRY(14,  12, 1, 0, 1), // 250 kbaud
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    CAN_BR_TBL_ENTRY( 7,  11, 1, 0, 0), // 500 kbaud
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    CAN_BR_TBL_ENTRY( 4,  11, 1, 0, 0), // 800 kbaud
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    CAN_BR_TBL_ENTRY( 3,  11, 1, 0, 0), // 1000 kbaud
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    CAN_BR_TBL_ENTRY( 0,   0, 0, 0, 0), // Autobaud  - not supported
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};
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#define HAL_LPC2XXX_BAUD_TBL_DEFINED 1
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#endif // CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 60000000
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#if CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 30000000
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//
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// Table with register values for baudrates at peripheral clock of 30 MHz
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//
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static const cyg_uint32 lpc2xxx_br_tbl[] =
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{
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    CAN_BR_TBL_ENTRY( 0,  0, 0, 0, 0), // 10  kbaud - not supported
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    CAN_BR_TBL_ENTRY( 0,  0, 0, 0, 0), // 20  kbaud - not supported
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    CAN_BR_TBL_ENTRY(59, 15, 2, 0, 1), // 50  kbaud
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    CAN_BR_TBL_ENTRY(39, 11, 1, 0, 1), // 100 kbaud
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    CAN_BR_TBL_ENTRY(29, 12, 1, 0, 1), // 125 kbaud
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    CAN_BR_TBL_ENTRY(14, 12, 1, 0, 1), // 250 kbaud
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    CAN_BR_TBL_ENTRY( 7, 11, 1, 0, 0), // 500 kbaud
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    CAN_BR_TBL_ENTRY( 4, 11, 1, 0, 0), // 800 kbaud
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    CAN_BR_TBL_ENTRY( 3, 11, 1, 0, 0), // 1000 kbaud
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    CAN_BR_TBL_ENTRY( 0,  0, 0, 0, 0), // Autobaud  - not supported
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};
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#define HAL_LPC2XXX_BAUD_TBL_DEFINED 1
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#endif // CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 30000000
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#if CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 15000000
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//
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// Table with register values for baudrates at peripheral clock of 15 MHz
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//
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static const cyg_uint32 lpc2xxx_br_tbl[] =
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{
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    CAN_BR_TBL_ENTRY(59, 15, 7, 0, 1), // 10  kbaud
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    CAN_BR_TBL_ENTRY(49, 11, 1, 0, 1), // 20  kbaud
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    CAN_BR_TBL_ENTRY(19, 11, 1, 0, 1), // 50  kbaud
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    CAN_BR_TBL_ENTRY( 9, 11, 1, 0, 1), // 100 kbaud
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    CAN_BR_TBL_ENTRY( 7, 11, 1, 0, 1), // 125 kbaud
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    CAN_BR_TBL_ENTRY( 3, 11, 1, 0, 1), // 250 kbaud
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    CAN_BR_TBL_ENTRY( 1, 11, 1, 0, 0), // 500 kbaud
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    CAN_BR_TBL_ENTRY( 0,  0, 0, 0, 0), // 800 kbaud - not supported
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    CAN_BR_TBL_ENTRY( 0, 11, 1, 0, 0), // 1000 kbaud
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    CAN_BR_TBL_ENTRY( 0,  0, 0, 0, 0), // Autobaud  - not supported
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};
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#define HAL_LPC2XXX_BAUD_TBL_DEFINED 1
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#endif // CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 15000000
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#if CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 48000000
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//
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// Table with register values for baudrates at peripheral clock of 48 MHz
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//
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static const cyg_uint32 lpc2xxx_br_tbl[] =
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{
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    CAN_BR_TBL_ENTRY( 0,  0, 0, 0, 0), // 10  kbaud - not supported
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    CAN_BR_TBL_ENTRY( 0,  0, 0, 0, 0), // 20  kbaud - not supported
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    CAN_BR_TBL_ENTRY(59, 12, 1, 0, 1), // 50  kbaud
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    CAN_BR_TBL_ENTRY(29, 12, 1, 0, 1), // 100 kbaud
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    CAN_BR_TBL_ENTRY(23, 12, 1, 0, 1), // 125 kbaud
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    CAN_BR_TBL_ENTRY(11, 12, 1, 0, 1), // 250 kbaud
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    CAN_BR_TBL_ENTRY( 5, 12, 1, 0, 0), // 500 kbaud
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    CAN_BR_TBL_ENTRY( 3, 11, 1, 0, 0), // 800 kbaud
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    CAN_BR_TBL_ENTRY( 2, 12, 1, 0, 0), // 1000 kbaud
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    CAN_BR_TBL_ENTRY( 0,  0, 0, 0, 0), // Autobaud  - not supported
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};
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#define HAL_LPC2XXX_BAUD_TBL_DEFINED 1
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#endif // CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 48000000
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#if CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 24000000
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//
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// Table with register values for baudrates at peripheral clock of 24 MHz
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//
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static const cyg_uint32 lpc2xxx_br_tbl[] =
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{
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    CAN_BR_TBL_ENTRY( 0,  0, 0, 0, 0), // 10  kbaud - not supported
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    CAN_BR_TBL_ENTRY(59, 15, 2, 0, 1), // 20  kbaud
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    CAN_BR_TBL_ENTRY(29, 12, 1, 0, 1), // 50  kbaud
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    CAN_BR_TBL_ENTRY(14, 12, 1, 0, 1), // 100 kbaud
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    CAN_BR_TBL_ENTRY(11, 12, 1, 0, 1), // 125 kbaud
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    CAN_BR_TBL_ENTRY( 5, 12, 1, 0, 1), // 250 kbaud
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    CAN_BR_TBL_ENTRY( 2, 12, 1, 0, 0), // 500 kbaud
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    CAN_BR_TBL_ENTRY( 1, 11, 1, 0, 0), // 800 kbaud
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    CAN_BR_TBL_ENTRY( 1,  5, 0, 0, 0), // 1000 kbaud
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    CAN_BR_TBL_ENTRY( 0,  0, 0, 0, 0), // Autobaud  - not supported
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};
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#define HAL_LPC2XXX_BAUD_TBL_DEFINED 1
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#endif // CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 24000000
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#if CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 12000000
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//
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// Table with register values for baudrates at peripheral clock of 12 MHz
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//
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static const cyg_uint32 lpc2xxx_br_tbl[] =
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{
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    CAN_BR_TBL_ENTRY(59, 15, 2, 0, 1), // 10  kbaud - not supported
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    CAN_BR_TBL_ENTRY(39, 11, 1, 0, 1), // 20  kbaud
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    CAN_BR_TBL_ENTRY(14, 12, 1, 0, 1), // 50  kbaud
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    CAN_BR_TBL_ENTRY( 7, 11, 1, 0, 1), // 100 kbaud
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    CAN_BR_TBL_ENTRY( 5, 12, 1, 0, 1), // 125 kbaud
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    CAN_BR_TBL_ENTRY( 2, 12, 1, 0, 1), // 250 kbaud
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    CAN_BR_TBL_ENTRY( 2, 05, 0, 0, 0), // 500 kbaud
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    CAN_BR_TBL_ENTRY( 0, 11, 1, 0, 0), // 800 kbaud
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    CAN_BR_TBL_ENTRY( 0,  9, 0, 0, 0), // 1000 kbaud
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    CAN_BR_TBL_ENTRY( 0,  0, 0, 0, 0), // Autobaud  - not supported
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};
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#define HAL_LPC2XXX_BAUD_TBL_DEFINED 1
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#endif // CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 12000000
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//==========================================================================
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//                          BIT TIMING MACRO
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//==========================================================================
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//
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// Macro fills baudrate register value depending on selected baudrate
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// For several LPC2XXX peripheral clock speeds we provide a pre calculated
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// baudrate table. If the board uses another clock speed, then the platform 
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// HAL needs to provide an own HAL_LPC2XXX_GET_CAN_BR() macro that returns 
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// valid baudrate register values or it needs to patch this file with
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// an additional table for the desired clock speed
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//
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//
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// If a certain baudrate is not supported, then this macro shall return
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// 0 as the baudrate register value
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//
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#ifdef HAL_LPC2XXX_BAUD_TBL_DEFINED 
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#define HAL_LPC2XXX_GET_CAN_BR(_baudrate_, _br_)                 \
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CYG_MACRO_START                                                  \
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    _br_ = lpc2xxx_br_tbl[(_baudrate_) - CYGNUM_CAN_KBAUD_10];   \
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CYG_MACRO_END
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#endif // HAL_LPC2XXX_BAUD_TBL_DEFINED 
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//-------------------------------------------------------------------------
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#endif // #ifndef CYGONCE_CAN_LPC2XXX_BAUDRATES_H

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