OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [devs/] [eth/] [cf/] [current/] [include/] [devs_eth_cf.inl] - Blame information for rev 786

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 786 skrzyp
//==========================================================================
2
//
3
//      devs_eth_cf.inl
4
//
5
//      CF (PCMCIA) ethernet I/O definitions.
6
//
7
//==========================================================================
8
// ####ECOSGPLCOPYRIGHTBEGIN####
9
// -------------------------------------------
10
// This file is part of eCos, the Embedded Configurable Operating System.
11
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
12
//
13
// eCos is free software; you can redistribute it and/or modify it under
14
// the terms of the GNU General Public License as published by the Free
15
// Software Foundation; either version 2 or (at your option) any later
16
// version.
17
//
18
// eCos is distributed in the hope that it will be useful, but WITHOUT
19
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
20
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
21
// for more details.
22
//
23
// You should have received a copy of the GNU General Public License
24
// along with eCos; if not, write to the Free Software Foundation, Inc.,
25
// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
26
//
27
// As a special exception, if other files instantiate templates or use
28
// macros or inline functions from this file, or you compile this file
29
// and link it with other works to produce a work based on this file,
30
// this file does not by itself cause the resulting work to be covered by
31
// the GNU General Public License. However the source code for this file
32
// must still be made available in accordance with section (3) of the GNU
33
// General Public License v2.
34
//
35
// This exception does not invalidate any other reasons why a work based
36
// on this file might be covered by the GNU General Public License.
37
// -------------------------------------------
38
// ####ECOSGPLCOPYRIGHTEND####
39
//==========================================================================
40
//#####DESCRIPTIONBEGIN####
41
//
42
// Author(s):   jskov
43
// Contributors:jskov
44
// Date:        2001-06-15
45
// Purpose:     PCMCIA ethernet defintions
46
//
47
//####DESCRIPTIONEND####
48
//==========================================================================
49
 
50
#include            // CYGNUM_HAL_INTERRUPT_ETHR
51
#include 
52
#include 
53
#include 
54
 
55
#ifdef __WANT_CONFIG
56
 
57
#undef CYGHWR_NS_DP83902A_PLF_INT_CLEAR
58
#define CYGHWR_NS_DP83902A_PLF_INT_CLEAR(_dp_)                  \
59
    CYG_MACRO_START                                             \
60
    struct cf_slot* slot = (struct cf_slot*) (_dp_)->plf_priv;  \
61
    cf_clear_interrupt(slot);                                   \
62
    CYG_MACRO_END
63
 
64
#endif // __WANT_CONFIG
65
 
66
#ifdef __WANT_DEVS
67
 
68
externC int cyg_sc_lpe_int_vector(struct eth_drv_sc *sc);
69
externC bool cyg_sc_lpe_init(struct cyg_netdevtab_entry *tab);
70
 
71
#ifdef CYGPKG_DEVS_ETH_CF_ETH0
72
 
73
static dp83902a_priv_data_t dp83902a_eth0_priv_data = {
74
    tx_buf1: 0x40,
75
    tx_buf2: 0x48,
76
    rx_buf_start: 0x50,
77
    rx_buf_end: 0x80,
78
#ifdef CYGSEM_DEVS_ETH_CF_ETH0_SET_ESA
79
    esa : CYGDAT_DEVS_ETH_CF_ETH0_ESA,
80
    hardwired_esa : true,
81
#else
82
    hardwired_esa : false,
83
#endif
84
};
85
 
86
ETH_DRV_SC(dp83902a_sc,
87
           &dp83902a_eth0_priv_data, // Driver specific data
88
           CYGDAT_DEVS_ETH_CF_ETH0_NAME,
89
           dp83902a_start,
90
           dp83902a_stop,
91
           dp83902a_control,
92
           dp83902a_can_send,
93
           dp83902a_send,
94
           dp83902a_recv,
95
           dp83902a_deliver,     // "pseudoDSR" called from fast net thread
96
           dp83902a_poll,        // poll function, encapsulates ISR and DSR
97
           cyg_sc_lpe_int_vector);
98
 
99
NETDEVTAB_ENTRY(dp83902a_netdev,
100
                "dp83902a_" CYGDAT_DEVS_ETH_CF_ETH0_NAME,
101
                cyg_sc_lpe_init,
102
                &dp83902a_sc);
103
#endif // CYGPKG_DEVS_ETH_CF_ETH0
104
 
105
#endif // __WANT_DEVS
106
 
107
// EOF devs_eth_cf.inl

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.