OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [devs/] [eth/] [h8300/] [aki3068net/] [current/] [src/] [if_aki3068net.c] - Blame information for rev 786

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 786 skrzyp
//==========================================================================
2
//
3
//      if_aki3068net.c
4
//
5
//      Ethernet device driver for Akizuki H8/3068 Netwotk micom
6
//
7
//==========================================================================
8
// ####ECOSGPLCOPYRIGHTBEGIN####                                            
9
// -------------------------------------------                              
10
// This file is part of eCos, the Embedded Configurable Operating System.   
11
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
12
//
13
// eCos is free software; you can redistribute it and/or modify it under    
14
// the terms of the GNU General Public License as published by the Free     
15
// Software Foundation; either version 2 or (at your option) any later      
16
// version.                                                                 
17
//
18
// eCos is distributed in the hope that it will be useful, but WITHOUT      
19
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
20
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
21
// for more details.                                                        
22
//
23
// You should have received a copy of the GNU General Public License        
24
// along with eCos; if not, write to the Free Software Foundation, Inc.,    
25
// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
26
//
27
// As a special exception, if other files instantiate templates or use      
28
// macros or inline functions from this file, or you compile this file      
29
// and link it with other works to produce a work based on this file,       
30
// this file does not by itself cause the resulting work to be covered by   
31
// the GNU General Public License. However the source code for this file    
32
// must still be made available in accordance with section (3) of the GNU   
33
// General Public License v2.                                               
34
//
35
// This exception does not invalidate any other reasons why a work based    
36
// on this file might be covered by the GNU General Public License.         
37
// -------------------------------------------                              
38
// ####ECOSGPLCOPYRIGHTEND####                                              
39
//==========================================================================
40
//#####DESCRIPTIONBEGIN####
41
//
42
// Author(s):
43
// Contributors:
44
// Date:
45
// Purpose:      
46
// Description:
47
//              
48
//
49
//####DESCRIPTIONEND####
50
//
51
//==========================================================================
52
 
53
#include <pkgconf/system.h>
54
#include <pkgconf/io_eth_drivers.h>
55
 
56
#include <cyg/infra/cyg_type.h>
57
#include <cyg/hal/hal_arch.h>
58
#include <cyg/infra/diag.h>
59
#include <cyg/hal/drv_api.h>
60
#include <cyg/io/eth/eth_drv.h>
61
#include <cyg/io/eth/netdev.h>
62
 
63
#define DP_CARD_RESET 0x1f
64
 
65
#include <cyg/io/dp83902a.h>
66
 
67
void ns_dp83902a_plf_init(dp83902a_priv_data_t *dp)
68
{
69
    static struct {
70
        unsigned short offset;
71
        unsigned short data;
72
    } init_data[] = {
73
        {DP_DCR, 0x48},  // Bytewide access
74
        {DP_RBCH, 0},    // Remote byte count
75
        {DP_RBCL, 0},
76
        {DP_ISR, 0xFF},  // Clear any pending interrupts
77
        {DP_IMR, 0x00},  // Mask all interrupts 
78
        {DP_RCR, 0x20},  // Monitor
79
        {DP_TCR, 0x02},  // loopback
80
        {DP_RBCH, 32},   // Remote byte count
81
        {DP_RBCL, 0},
82
        {DP_RSAL, 0},    // Remote address
83
        {DP_RSAH, 0},
84
        {DP_CR, DP_CR_START|DP_CR_RDMA}  // Read data
85
    };
86
    unsigned char prom[32];
87
    int cnt,tmp;
88
 
89
    HAL_READ_UINT8(dp->base+DP_CARD_RESET, tmp);
90
    HAL_WRITE_UINT8(dp->base+DP_CARD_RESET, tmp);
91
    dp->data = dp->base+DP_DATAPORT;
92
    // Wait for card
93
    do {
94
        int cnt;
95
        DP_IN(dp->base, DP_ISR, tmp);
96
        for (cnt=0; cnt< 1024; cnt++);
97
    } while (0 == (tmp & DP_ISR_RESET));
98
 
99
    if (dp->hardwired_esa)
100
        return ;
101
 
102
    for (cnt=0; cnt<sizeof(init_data)/sizeof(init_data[0]); cnt++)
103
        DP_OUT(dp->base, init_data[cnt].offset, init_data[cnt].data);
104
    for (cnt = 0;  cnt < 32;  cnt++)
105
        DP_IN_DATA(dp->data, prom[cnt]);
106
    if ((prom[0] == 0xff) && (prom[2] == 0xff) && (prom[4] == 0xff)) {
107
        dp->base = 0;
108
        return ;
109
    }
110
    DP_OUT(dp->base, DP_CR, DP_CR_NODMA | DP_CR_PAGE1);
111
    for (cnt = 0; cnt < 6; cnt ++) {
112
        DP_OUT(dp->base, DP_P1_PAR0+cnt, prom[cnt*2]);
113
    }
114
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.