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//==========================================================================
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//
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// dev/DM9161A.c
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//
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// Ethernet transceiver (PHY) support
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//
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//==========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 2003 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): John Eigelaar
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// Contributors: Gary Thomas
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// Date: 2006-12-07
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// Purpose:
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// Description: Support for Davicom DM9161A PHY
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//
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#include <pkgconf/system.h>
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#include <pkgconf/devs_eth_phy.h>
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#include <cyg/infra/cyg_type.h>
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#include <cyg/hal/hal_arch.h>
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#include <cyg/hal/drv_api.h>
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#include <cyg/hal/hal_if.h>
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#include <cyg/hal/hal_tables.h>
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#include <cyg/io/eth_phy.h>
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#include <cyg/io/eth_phy_dev.h>
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#define DM9161A_BMSR 0x01
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#define DM9161A_BMSR_ANEG_COMP (1<<5)
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#define DM9161A_BMSR_LINK (1<<2)
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#define DM9161A_BMCR 0x00
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#define DM9161A_DSCSR 17
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#define DM9161A_DSCSR_100FDX (1<<15)
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#define DM9161A_DSCSR_100HDX (1<<14)
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#define DM9161A_DSCSR_10FDX (1<<13)
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#define DM9161A_DSCSR_10HDX (1<<12)
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static bool dm9161a_stat(eth_phy_access_t *f, int *state)
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{
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unsigned short phy_state;
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int tries;
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*state = 0;
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// Read negotiated state
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if (_eth_phy_read(f, DM9161A_BMSR, f->phy_addr, &phy_state))
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{
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if ((phy_state & DM9161A_BMSR_ANEG_COMP) == 0)
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{
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eth_phy_printf("... waiting for auto-negotiation");
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for (tries = 0; tries < CYGINT_DEVS_ETH_PHY_AUTO_NEGOTIATION_TIME;
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tries++)
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{
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if (_eth_phy_read(f, DM9161A_BMSR, f->phy_addr, &phy_state))
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{
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if ((phy_state & DM9161A_BMSR_ANEG_COMP) != 0)
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{
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break;
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}
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}
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CYGACC_CALL_IF_DELAY_US(1000000); // 1 second
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eth_phy_printf(".");
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}
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eth_phy_printf("\n");
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}
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if ((phy_state & DM9161A_BMSR_ANEG_COMP) != 0)
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{
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*state = 0;
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if (!_eth_phy_read(f, DM9161A_DSCSR, f->phy_addr, &phy_state))
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return false;
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if (phy_state & 0xF000)
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{
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*state |= ETH_PHY_STAT_LINK;
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}
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if ((phy_state & DM9161A_DSCSR_100FDX) ||
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(phy_state & DM9161A_DSCSR_100HDX))
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{
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*state |= ETH_PHY_STAT_100MB;
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}
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if ((phy_state & DM9161A_DSCSR_100FDX) ||
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(phy_state & DM9161A_DSCSR_10FDX))
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{
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*state |= ETH_PHY_STAT_FDX;
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}
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return (true);
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}
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}
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return (false);
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}
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_eth_phy_dev("Davicom DM9161A", 0x0181B8A0, dm9161a_stat)
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