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#ifndef CYGONCE_PHY_IP101A_HEADER_
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#define CYGONCE_PHY_IP101A_HEADER_
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//==========================================================================
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//
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// phy/ip101a.h
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//
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// Ethernet PHY driver
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//
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//==========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
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// 2008, 2009 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): Edgar Grimberg
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// Contributors:
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// Date: 2009-11-01
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// Purpose:
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// Description: Hardware driver for Ethernet PHY IC+ IP101A
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//
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#define MII_CTRL_REG 0x00
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#define MII_STAT_REG 0x01
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#define MII_PHY_ID1_REG 0x02
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#define MII_PHY_ID2_REG 0x03
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#define MII_AUTO_NEG_ADV_REG 0x04
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#define MII_AUTO_NEG_LPA_REG 0x05
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#define MII_AUTO_NEG_EXP_REG 0x06
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#define MII_PHY_CTRL_REG 0x10
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#define MII_PHY_IRQ_REG 0x11
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#define MII_PHY_STAT_REG 0x12
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#define MII_PHY_CTRL2_REG 0x1E
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#define MII_PHY_IRQ_INTR 0x8000
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#define MII_PHY_IRQ_ALL_MASK 0x0800
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#define MII_PHY_IRQ_SPEED_MASK 0x0400
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#define MII_PHY_IRQ_DUPLEX_MASK 0x0200
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#define MII_PHY_IRQ_LINK_MASK 0x0100
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#define MII_PHY_IRQ_ARBITER_MASK 0x0080
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#define MII_PHY_IRQ_ARBITER_CHANGE 0x0040
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#define MII_PHY_IRQ_SPEED_CHANGE 0x0004
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#define MII_PHY_IRQ_DUPLEX_CHANGE 0x0002
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#define MII_PHY_IRQ_LINK_CHANGE 0x0001
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#define IP101A_CTRL_DUPLEX 0x0100
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#define IP101A_CTRL_100MB 0x2000
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#define IP101A_CTRL_AUTO_NEG 0x1000
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#define IP101A_CTRL_AUTO_NEG_RST 0x0200
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#define IP101A_LINK_STATUS 0x0004
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#define IP101A_AUTO_COMPLETED 0x20
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#define IP101A_DUPLEX_MODE 0x2000
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#define IP101A_SPEED_100MB 0x4000
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#define IP101A_LINK_STATUS2 0x0400
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#endif // CYGONCE_PHY_IP101A_HEADER_
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