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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [devs/] [flash/] [amd/] [am29xxxxxv2/] [current/] [doc/] [am29xxxxx.sgml] - Blame information for rev 786

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1 786 skrzyp
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AMD AM29xxxxx Flash Device Driver
36
 
37
38
  
39
    Overview
40
  
41
  
42
    Overview
43
    eCos Support for AMD AM29xxxxx Flash Devices and Compatibles
44
  
45
 
46
  Description
47
    
48
The CYGPKG_DEVS_FLASH_AMD_AM29XXXXX_V2 AMD
49
AM29xxxxx V2 flash driver package implements support for the AM29xxxxx
50
family of flash devices and compatibles. Normally the driver is not
51
accessed directly. Instead application code will use the API provided
52
by the generic flash driver package
53
CYGPKG_IO_FLASH, for example by calling functions
54
like cyg_flash_program.
55
    
56
    
57
The driver imposes one restriction on application code which
58
developers should be aware of: when programming the flash the
59
destination addresses must be aligned to a bus boundary. For example
60
if the target hardware has a single flash device attached to a 16-bit
61
bus then program operations must involve a multiple of 16-bit values
62
aligned to a 16-bit boundary. Note that it is the bus width that
63
matters, not the device width. If the target hardware has two 16-bit
64
devices attached to a 32-bit bus then program operations must still be
65
aligned to a 32-bit boundary, even though in theory a 16-bit boundary
66
would suffice. In practice this is rarely an issue, and requiring the
67
larger boundary greatly simplifies the code and improves performance.
68
    
69
    
70
Many eCos targets with AM29xxxxx or compatible flash devices will
71
still use the older driver package
72
CYGPKG_DEVS_FLASH_AMD_AM29XXXXX. Only newer ports
73
and some older ports that have been converted will use the V2 driver.
74
This documentation only applies to the V2 driver.
75
    
76
  
77
 
78
  Configuration Options
79
    
80
The AM29xxxxx flash driver package will be loaded automatically when
81
configuring eCos for a target with suitable hardware. However the
82
driver will be inactive unless the generic flash package
83
CYGPKG_IO_FLASH is loaded. It may be necessary to
84
add this generic package to the configuration explicitly before the
85
driver functionality becomes available. There should never be any need
86
to load or unload the AM29xxxx driver package.
87
    
88
    
89
There are a number of configuration options, relating mostly to hardware
90
characteristics. It is very rare that application developers need to
91
change any of these. For example the option
92
CYGNUM_DEVS_FLASH_AMD_AM29XXXXX_V2_ERASE_REGIONS
93
may need a non-default value if the flash devices used on the target
94
have an unusual boot block layout. If so the platform HAL will impose
95
a requires constraint on this option and the configuration system will
96
resolve the constraint. The only time it might be necessary to change
97
the value manually is if the actual board being used is a variant of
98
the one supported by the platform HAL and uses a different flash chip.
99
    
100
  
101
102
 
103
104
  
105
    Instantiating an AM29xxxxx Device
106
  
107
  
108
    Instantiating
109
    including the driver in an eCos target
110
  
111
  
112
    
113
      
114
#include <cyg/io/am29xxxxx_dev.h>
115
      
116
      
117
        int cyg_am29xxxxx_init_check_devid_XX
118
        struct cyg_flash_dev* device
119
      
120
      
121
        int cyg_am29xxxxx_init_cfi_XX
122
        struct cyg_flash_dev* device
123
      
124
      
125
        int cyg_am29xxxxx_erase_XX
126
        struct cyg_flash_dev* device
127
        cyg_flashaddr_t addr
128
      
129
      
130
        int cyg_am29xxxxx_program_XX
131
        struct cyg_flash_dev* device
132
        cyg_flashaddr_t addr
133
        const void* data
134
        size_t len
135
      
136
      
137
        int cyg_at49xxxx_softlock
138
        struct cyg_flash_dev* device
139
        const cyg_flashaddr_t addr
140
      
141
      
142
        int cyg_at49xxxx_hardlock
143
        struct cyg_flash_dev* device
144
        const cyg_flashaddr_t addr
145
      
146
      
147
        int cyg_at49xxxx_unlock
148
        struct cyg_flash_dev* device
149
        const cyg_flashaddr_t addr
150
      
151
      
152
        int cyg_am29xxxxx_read_devid_XX
153
        struct cyg_flash_dev* device
154
      
155
    
156
  
157
 
158
  Description
159
    
160
The AM29xxxxx family contains some hundreds of different flash
161
devices, all supporting the same basic set of operations but with
162
various common or uncommon extensions. The devices vary in capacity,
163
performance, boot block layout, and width. There are also
164
platform-specific issues such as how many devices are actually present
165
on the board and where they are mapped in the address space. The
166
AM29xxxxx driver package cannot know the details of every chip and
167
every platform. Instead it is the responsibility of another package,
168
usually the platform HAL, to supply the necessary information by
169
instantiating some data structures. Two pieces of information are
170
especially important: the bus configuration and the boot block layout.
171
    
172
    
173
Flash devices are typically 8-bits, 16-bits, or 32-bits wide (64-bit
174
devices are not yet in common use). Most 16-bit devices will also
175
support 8-bit accesses, but not all. Similarly 32-bit devices can be
176
accessed 16-bits at a time or 8-bits at a time. A board will have one
177
or more of these devices on the bus. For example there may be a single
178
16-bit device on a 16-bit bus, or two 16-bit devices on a 32-bit bus.
179
The processor's bus logic determines which combinations are possible,
180
and there will be a trade off between cost and performance: two 16-bit
181
devices in parallel can provide twice the memory bandwidth of a single
182
device. The driver supports the following combinations:
183
    
184
    
185
      
186
        8
187
        
188
A single 8-bit flash device on an 8-bit bus.
189
        
190
       
191
      
192
        16
193
        
194
A single 16-bit flash device on a 16-bit bus.
195
        
196
       
197
      
198
        32
199
        
200
A single 32-bit flash device on an 32-bit bus.
201
        
202
       
203
      
204
        88
205
        
206
Two parallel 8-bit devices on an 16-bit bus.
207
        
208
       
209
      
210
        8888
211
        
212
Four parallel 8-bit devices on a 32-bit bus.
213
        
214
       
215
      
216
        1616
217
        
218
Two parallel 16-bit devices on a 32-bit bus, with one device providing
219
the bottom two bytes of each 32-bit datum and the other device
220
providing the top two bytes.
221
        
222
       
223
      
224
        16as8
225
        
226
A single 16-bit flash device connected to an 8-bit bus.
227
        
228
       
229
    
230
    
231
These configuration all require slightly different code to manipulate
232
the hardware. The AM29xxxxx driver package provides separate functions
233
for each configuration, for example
234
cyg_am29xxxxx_erase_16 and
235
cyg_am29xxxxx_program_1616.
236
    
237
    
238
At the time of writing not all the configurations have been tested.
239
    
240
    
241
The second piece of information is the boot block layout. Flash
242
devices are subdivided into blocks (also known as sectors - both terms
243
are in common use). Some operations such as erase work on a whole
244
block at a time, and for most applications a block is the smallest
245
unit that gets updated. A typical block size is 64K. It is inefficient
246
to use an entire 64K block for small bits of configuration data and
247
similar information, so many flash devices also support a number of
248
smaller boot blocks. A typical 2MB flash device could have a single
249
16K block, followed by two 8K blocks, then a 32K block, and finally 31
250
full-size 64K blocks. The boot blocks may appear at the bottom or the
251
top of the device. So-called uniform devices do not have boot blocks,
252
just full-size ones. The driver needs to know the boot block layout.
253
With modern devices it can work this out at run-time, but often it is
254
better to provide the information statically.
255
    
256
  
257
 
258
  Example
259
    
260
In most cases flash support is specific to a platform. Even if two
261
platforms happen to use the same flash device there are likely to be
262
differences such as the location in the address map. Hence there is
263
little possibility of re-using the platform-specific code, and this
264
code should be placed in the platform HAL rather than in a separate
265
package. Typically this involves a separate file and a corresponding
266
compile property in the platform HAL's CDL:
267
    
268
    
269
cdl_package CYGPKG_HAL_M68K_ALAIA {
270
271
    compile -library=libextras.a alaia_flash.c
272
273
}
274
    
275
    
276
The contents of this file will not be accessed directly, only
277
indirectly via the generic flash API, so normally it would be removed
278
by link-time garbage collection. To avoid this the object file has to
279
go into libextras.a.
280
    
281
    
282
The actual file alaia_flash.c will look something like:
283
    
284
    
285
#include <pkgconf/system.h>
286
#ifdef CYGPKG_DEVS_FLASH_AMD_AM29XXXXX_V2
287
 
288
#include <cyg/io/flash.h>
289
#include <cyg/io/flash_dev.h>
290
#include <cyg/io/am29xxxxx_dev.h>
291
 
292
static const CYG_FLASH_FUNS(hal_alaia_flash_amd_funs,
293
    &cyg_am29xxxxx_init_check_devid_16,
294
    &cyg_flash_devfn_query_nop,
295
    &cyg_am29xxxxx_erase_16,
296
    &cyg_am29xxxxx_program_16,
297
    (int (*)(struct cyg_flash_dev*, const cyg_flashaddr_t, void*, size_t))0,
298
    &cyg_flash_devfn_lock_nop,
299
    &cyg_flash_devfn_unlock_nop);
300
 
301
static const cyg_am29xxxxx_dev hal_alaia_flash_priv = {
302
    .devid      = 0x45,
303
    .block_info = {
304
        { 0x00004000, 1 },
305
        { 0x00002000, 2 },
306
        { 0x00008000, 1 },
307
        { 0x00010000, 63 }
308
    }
309
};
310
 
311
CYG_FLASH_DRIVER(hal_alaia_flash,
312
                 &hal_alaia_flash_amd_funs,
313
                 0,
314
                 0xFFC00000,
315
                 0xFFFFFFFF,
316
                 4,
317
                 hal_alaia_flash_priv.block_info,
318
                 &hal_alaia_flash_priv
319
);
320
#endif
321
    
322
    
323
The bulk of the file is protected by an #ifdef for
324
the AM29xxxxx flash driver. That driver will only be active if the
325
generic flash support is enabled. Without that support there will be
326
no way of accessing the device so instantiating the data structures
327
would serve no purpose. The rest of the file is split into three
328
structure definitions. The first supplies the functions which will be
329
used to perform the actual flash accesses, using a macro provided by
330
the generic flash code in 
331
class="headerfile">cyg/io/flash_dev.h. The relevant ones
332
have an _16 suffix, indicating that on this board
333
there is a single 16-bit flash device on a 16-bit bus. The second
334
provides information specific to AM29xxxxx flash devices.
335
The third provides the cyg_flash_dev
336
structure needed by the generic flash code, which contains pointers to
337
the previous two.
338
    
339
  
340
 
341
  Functions
342
    
343
All eCos flash device drivers must implement a standard interface,
344
defined by the generic flash code CYGPKG_IO_FLASH.
345
This interface includes a table of seven function pointers for various
346
operations: initialization, query, erase, program, read, locking and
347
unlocking. The query operation is optional and the generic flash
348
support provides a dummy implementation
349
cyg_flash_devfn_query_nop. AM29xxxxx flash
350
devices are always directly accessible so there is no need for a
351
separate read function. The remaining functions are more complicated.
352
    
353
    
354
Usually the table can be declared const. In a ROM
355
startup application this avoids both ROM and RAM copies of the table,
356
saving a small amount of memory. const should not
357
be used if the table may be modified by a platform-specific
358
initialization routine.
359
    
360
 
361
    Initialization
362
      
363
There is a choice of three main initialization functions. The simplest
364
is cyg_flash_devfn_init_nop, which does nothing.
365
It can be used if the cyg_am29xxxxx_dev and
366
cyg_flash_dev structures are fully
367
initialized statically and the flash will just work without special
368
effort. This is useful if it is guaranteed that the board will always
369
be manufactured using the same flash chip, since the nop function
370
involves the smallest code size and run-time overheads.
371
      
372
      
373
The next step up is
374
cyg_am29xxxxx_init_check_devid_XX, where
375
XX will be replaced by the suffix appropriate for
376
the bus configuration. It is still necessary to provide all the device
377
information statically, including the devid
378
field in the cyg_am29xxxxx_dev structure.
379
This initialization function will attempt to query the flash device
380
and check that the provided device id matches the actual hardware. If
381
there is a mismatch the device will be marked uninitialized and
382
subsequent attempts to manipulate the flash will fail.
383
      
384
      
385
If the board may end up being manufactured with any of a number of
386
different flash chips then the driver can perform run-time
387
initialization, using a cyg_am29xxxxx_init_cfi_XX
388
function. This queries the flash device as per the Common Flash Memory
389
Interface Specification, supported by all current devices (although
390
not necessarily by older devices). The
391
block_info field in the
392
cyg_am29xxxxx_dev structure and the
393
end and
394
num_block_infos fields in the
395
cyg_flash_dev structure will be filled in.
396
It is still necessary to supply the start
397
field statically since otherwise the driver will not know how to
398
access the flash device. The main disadvantage of using CFI is that it
399
increases the code size.
400
      
401
      
402
If CFI is used then the cyg_am29xxxxx_dev
403
structure must not be declared const. The CFI code
404
will attempt to update the structure and will fail if the structure is
405
held in read-only memory. This would leave the flash driver
406
non-functional.
407
      
408
      
409
A final option is to use a platform-specific initialization function.
410
This may be useful if the board may be manufactured with one of a
411
small number of different flash devices and the platform HAL needs to
412
adapt to this. The AM29xxxxx driver provides a utility function to
413
read the device id, cyg_am29xxxxx_read_devid_XX:
414
      
415
      
416
static int
417
alaia_flash_init(struct cyg_flash_dev* dev)
418
{
419
    int devid = cyg_am29xxxxx_read_devid_1616(dev);
420
    switch(devid) {
421
        case 0x0042 :
422
423
        case 0x0084 :
424
425
        default:
426
          return CYG_FLASH_ERR_DRV_WRONG_PART;
427
    }
428
}
429
      
430
      
431
There are many other possible uses for a platform-specific
432
initialization function. For example initial prototype boards might
433
have only supported 8-bit access to a 16-bit flash device rather than
434
16-bit access, but this problem was fixed in the next revision. The
435
platform-specific initialization function can figure out which model
436
board it is running on and replace the default
437
16as8 functions with faster 16
438
ones.
439
      
440
    
441
 
442
    Erase and Program
443
      
444
The AM29xxxxx driver provides erase and program functions appropriate
445
for the various bus configurations. On most targets these can be used
446
directly. On some targets it may be necessary to do some extra work
447
before and after the erase and program operations. For example if the
448
hardware has an MMU then the part of the address map containing the
449
flash may have been set to read-only, in an attempt to catch spurious
450
memory accesses. Erasing or programming the flash requires
451
write-access, so the MMU settings have to be changed temporarily. As
452
another example some flash device may require a higher voltage to be
453
applied during an erase or program operation. or a higher voltage may
454
be desirable to make the operation proceed faster. A typical
455
platform-specific erase function would look like this:
456
      
457
      
458
static int
459
alaia_flash_erase(struct cyg_flash_dev* dev, cyg_flashaddr_t addr)
460
{
461
    int result;
462
    …  // Set up the hardware for an erase
463
    result = cyg_am29xxxxx_erase_32(dev, addr);
464
    …  // Revert the hardware change
465
    return result;
466
}
467
      
468
      
469
There are two configurations which affect the erase and program
470
functions, and which a platform HAL may wish to change:
471
CYGNUM_DEVS_FLASH_AMD_AM29XXXXX_V2_ERASE_TIMEOUT
472
and
473
CYGNUM_DEVS_FLASH_AMD_AM29XXXXX_V2_PROGRAM_TIMEOUT.
474
The erase and program operations both involve polling for completion,
475
and these timeout impose an upper bound on the polling loop. Normally
476
these operations should never take anywhere close to the timeout
477
period, so a timeout indicates a catastrophic failure that should
478
really be handled by a watchdog reset. A reset is particularly
479
appropriate because there will be no clean way of aborting the flash
480
operation. The main reason for the timeouts is to help with debugging
481
when porting to new hardware. If there is a valid reason why a
482
particular platform needs different timeouts then the platform HAL's
483
CDL can require appropriate values for these options.
484
      
485
    
486
 
487
    Locking
488
      
489
There is no single way of implementing the block lock and unlock
490
operations on all AM29xxxxx devices. If these operations are supported at
491
all then usually they involve manipulating the voltages on certain
492
pins. This would not be able to be handled by generic driver code since it requires
493
knowing how these pins can be manipulated via the processor's GPIO
494
lines. Therefore the AM29xxxxx driver does not usually provide lock and unlock
495
functions, and instead the generic dummy functions
496
cyg_flash_devfn_lock_nop and
497
cyg_flash_devfn_unlock_nop should be used. An 
498
linkend="am29xxxxx-at49xxxx-locking">exception exists for
499
the AT49xxxx family of devices which are sufficiently AMD
500
compatible in other respects. Otherwise, if a
501
platform does provide a way of implementing the locking then this can
502
be handled by platform-specific functions.
503
      
504
      
505
static int
506
alaia_lock(struct cyg_flash_dev* dev, const cyg_flashaddr_t addr)
507
{
508
509
}
510
 
511
static int
512
alaia_unlock(struct cyg_flash_dev* dev, const cyg_flashaddr_t addr)
513
{
514
515
}
516
      
517
      
518
If real locking functions are implemented then the platform HAL's CDL
519
script should implement the CDL interface
520
CYGHWR_IO_FLASH_BLOCK_LOCKING. Otherwise the
521
generic flash package may believe that none of the flash drivers in the
522
system provide locking functionality and disable the interface functions.
523
      
524
    
525
      AT49xxxx locking
526
      
527
As locking is standardised across the AT49xxxx family of AMD AM29xxxxx
528
compatible Flash parts, a method supporting this is included within this
529
driver. cyg_at49xxxx_softlock_XX provides a means of
530
locking a Flash sector such that it may be subsequently unlocked.
531
cyg_at49xxxx_hardlock_XX locks a sector such that
532
it cannot be unlocked until after reset or a power cycle.
533
cyg_at49xxxx_unlock_XX unlocks a sector that has
534
previously been softlocked. At power on or Flash device reset, all sectors
535
default to being softlocked.
536
      
537
    
538
    
539
 
540
    Other
541
      
542
The driver provides a set of functions
543
cyg_am29xxxxx_read_devid_XX, one per supported
544
bus configuration. These functions take a single argument, a pointer
545
to the cyg_flash_dev structure, and return
546
the chip's device id. For older devices this id is a single byte. For
547
more recent devices the id is a 3-byte value, 0x7E followed by a
548
further two bytes that actually identify the device.
549
cyg_am29xxxxx_read_devid_XX is usually called
550
only from inside a platform-specific driver initialization routine,
551
allowing the platform HAL to adapt to the actual device present on the
552
board.
553
      
554
    
555
  
556
 
557
  Device-Specific Structure
558
    
559
The cyg_am29xxxxx_dev structure provides
560
information specific to AM29xxxxx flash devices, as opposed to the
561
more generic flash information which goes into the
562
cyg_flash_dev structure. There are only two
563
fields: devid and
564
block_info.
565
    
566
    
567
devid is only needed if the driver's
568
initialization function is set to
569
cyg_am29xxxxx_init_check_devid_XX. That function
570
will extract the actual device info from the flash chip and compare it
571
with the devid field. If there is a
572
mismatch then subsequent operations on the device will fail.
573
    
574
    
575
The block_info field consists of one or
576
more pairs of the block size in bytes and the number of blocks of that
577
size. The order must match the actual hardware device since the flash
578
code will use the table to determine the start and end locations of
579
each block. The table can be initialized in one of three ways:
580
    
581
    
582
      
583
If the driver initialization function is set to
584
cyg_flash_devfn_init_nop or
585
cyg_am29xxxxx_init_check_devid_XX then the block
586
information should be provided statically. This is appropriate if the
587
board will also be manufactured using the same flash chip.
588
      
589
      
590
If cyg_am29xxxxx_init_cfi_XX is used then this
591
will fill in the block info table. Hence there is no need for static
592
initialization.
593
      
594
      
595
If a platform-specific initialization function is used then either
596
this should fill in the block info table, or the info should be
597
provided statically.
598
      
599
    
600
    
601
The size of the block_info table is
602
determined by the configuration option
603
CYGNUM_DEVS_FLASH_AMD_AM29XXXXX_V2_ERASE_REGIONS.
604
This has a default value of 4, which should suffice for nearly all
605
AM29xxxxx flash devices. If more entries are needed then the platform
606
HAL's CDL script should require a larger value.
607
    
608
    
609
If the cyg_am29xxxxx_dev structure is
610
statically initialized then it can be const. This
611
saves a small amount of memory in ROM startup applications. If the
612
structure is updated at run-time, either by
613
cyg_am29xxxxx_init_cfi_XX or by a
614
platform-specific initialization routine, then it cannot be
615
const.
616
    
617
  
618
 
619
  Flash Structure
620
    
621
Internally the generic flash code works in terms of
622
cyg_flash_dev structures, and the platform
623
HAL should define one of these. The structure should be placed in the
624
cyg_flashdev table. The following fields need to be
625
provided:
626
    
627
    
628
      
629
        funs
630
        
631
This should point at the table of functions.
632
        
633
      
634
      
635
        start
636
        
637
The base address of the flash in the address map. On
638
some board the flash may be mapped into memory several times, for
639
example it may appear in both cached and uncached parts of the address
640
space. The start field should correspond to
641
the cached address.
642
        
643
      
644
      
645
        end
646
        
647
The address of the last byte in the flash. It can
648
either be statically initialized, or
649
cyg_am29xxxxx_init_cfi_XX will calculate
650
its value at run-time.
651
        
652
      
653
      
654
        num_block_infos
655
        
656
This should be the number of entries in the
657
block_info table. It can either be
658
statically initialized or it will be filled in by
659
cyg_am29xxxxx_init_cfi_XX.
660
        
661
      
662
      
663
        block_info
664
        
665
The table with the block information is held in the
666
cyg_am29xxxxx_dev structure, so this field
667
should just point into that structure.
668
        
669
      
670
      
671
        priv
672
        
673
This field is reserved for use by the device driver. For the AM29xxxxx
674
driver it should point at the appropriate
675
cyg_am29xxxxx_dev structure.
676
        
677
      
678
    
679
    
680
The cyg_flash_dev structure contains a number
681
of other fields which are manipulated only by the generic flash code.
682
Some of these fields will be updated at run-time so the structure
683
cannot be declared const.
684
    
685
  
686
 
687
  Multiple Devices
688
    
689
A board may have several flash devices in parallel, for example two
690
16-bit devices on a 32-bit bus. It may also have several such banks
691
to increase the total amount of flash. If each device provides 2MB,
692
there could be one bank of 2 parallel flash devices at 0xFF800000 and
693
another bank at 0xFFC00000, giving a total of 8MB. This setup can be
694
described in several ways. One approach is to define two
695
cyg_flash_dev structures. The table of
696
function pointers can usually be shared, as can the
697
cyg_am29xxxxx_dev structure. Another approach
698
is to define a single cyg_flash_dev
699
structure but with a larger block_info
700
table, covering the blocks in both banks of devices. The second
701
approach makes more efficient use of memory.
702
    
703
    
704
Many variations are possible, for example a small slow flash device
705
may be used for initial bootstrap and holding the configuration data,
706
while there is also a much larger and faster device to hold a file
707
system. Such variations are usually best described by separate
708
cyg_flash_dev structures.
709
    
710
    
711
If more than one cyg_flash_dev structure is
712
instantiated then the platform HAL's CDL script should implement the
713
CDL interface CYGHWR_IO_FLASH_DEVICE once for every
714
device past the first. Otherwise the generic code may default to the
715
case of a single flash device and optimize for that.
716
    
717
  
718
 
719
  Platform-Specific Macros
720
    
721
The AM29xxxxx driver source code includes the header files
722
cyg/hal/hal_arch.h and
723
cyg/hal/hal_io.h, and hence
724
indirectly the corresponding platform header files (if defined).
725
Optionally these headers can define macros which are used inside the
726
driver, thus giving the HAL limited control over how the driver works.
727
    
728
  
729
 
730
  Cache Management
731
    
732
By default the AM29xxxxx driver assumes that the flash can be accessed
733
uncached, and it will use the HAL
734
CYGARC_UNCACHED_ADDRESS macro to map the cached
735
address in the start field of the
736
cyg_flash_dev structure into an uncached
737
address. If for any reason this HAL macro is inappropriate for the
738
flash then an alternative macro
739
HAL_AM29XXXXX_UNCACHED_ADDRESS can be defined
740
instead. However fixing the
741
CYGARC_UNCACHED_ADDRESS macro is normally the
742
better solution.
743
    
744
    
745
If there is no way of bypassing the cache then the platform HAL should
746
implement the CDL interface
747
CYGHWR_DEVS_FLASH_AMD_AM29XXXXX_V2_CACHED_ONLY. The flash
748
driver will now disable and re-enable the cache as required. For
749
example a program operation will involve the following:
750
    
751
    
752
    AM29_INTSCACHE_STATE;
753
    AM29_INTSCACHE_BEGIN();
754
    while ( ! finished ) {
755
        program data
756
    }
757
    AM29_INTSCACHE_END();
758
    
759
    
760
The default implementations of these INTSCACHE macros are as follows:
761
STATE defines any local variables that may be
762
needed, e.g. to save the current interrupt state;
763
BEGIN disables interrupts, synchronizes the data
764
caches, disables it, and invalidates the current contents;
765
END re-enables the cache and then
766
interrupts. The cache is only disabled when interrupts are disabled,
767
so there is no possibility of an interrupt handler running or a
768
context switch occurring while the cache is disabled, potentially
769
leaving the system running very slowly. The data cache synchronization
770
ensures that there are no dirty cache lines, so when the cache is
771
disabled the low-level flash write code will not see stale data in
772
memory. The invalidate ensures that at the end of the operation
773
higher-level code will not pick up stale cache contents instead of the
774
newly written flash data.
775
    
776
    
777
Some implementations of the HAL cache macros may not provide the exact
778
semantics required by the flash driver. For example
779
HAL_DCACHE_DISABLE may have an unwanted side
780
effect, or it may do more work than is needed here. The driver will
781
check for alternative macros
782
HAL_AM29XXXXX_INTSCACHE_STATE,
783
HAL_AM29XXXXX_INTSCACHE_BEGIN and
784
HAL_AM29XXXXX_INTSCACHE_END, using these instead of
785
the defaults.
786
    
787
  
788
 
789

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