OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [devs/] [i2c/] [m68k/] [mcf52xx/] [current/] [include/] [i2c_mcf52xx.h] - Blame information for rev 786

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 786 skrzyp
//==========================================================================
2
//
3
//      devs/i2c/m68k/mcf52xx/current/src/i2c_mcf52xx.h
4
//
5
//      I2C driver for Motorola coldfire processors
6
//
7
//==========================================================================
8
// ####ECOSGPLCOPYRIGHTBEGIN####                                            
9
// -------------------------------------------                              
10
// This file is part of eCos, the Embedded Configurable Operating System.   
11
// Copyright (C) 2005, 2006 Free Software Foundation, Inc.                  
12
//
13
// eCos is free software; you can redistribute it and/or modify it under    
14
// the terms of the GNU General Public License as published by the Free     
15
// Software Foundation; either version 2 or (at your option) any later      
16
// version.                                                                 
17
//
18
// eCos is distributed in the hope that it will be useful, but WITHOUT      
19
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
20
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
21
// for more details.                                                        
22
//
23
// You should have received a copy of the GNU General Public License        
24
// along with eCos; if not, write to the Free Software Foundation, Inc.,    
25
// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
26
//
27
// As a special exception, if other files instantiate templates or use      
28
// macros or inline functions from this file, or you compile this file      
29
// and link it with other works to produce a work based on this file,       
30
// this file does not by itself cause the resulting work to be covered by   
31
// the GNU General Public License. However the source code for this file    
32
// must still be made available in accordance with section (3) of the GNU   
33
// General Public License v2.                                               
34
//
35
// This exception does not invalidate any other reasons why a work based    
36
// on this file might be covered by the GNU General Public License.         
37
// -------------------------------------------                              
38
// ####ECOSGPLCOPYRIGHTEND####                                              
39
//==========================================================================
40
//#####DESCRIPTIONBEGIN####
41
//
42
// Author(s):     Bart Veer
43
// Contributors:  
44
// Date:          2005-11-20
45
// Description:   I2C driver for motorola coldfire processor
46
//####DESCRIPTIONEND####
47
//==========================================================================
48
 
49
#include <pkgconf/devs_i2c_mcf52xx.h>
50
#include <cyg/infra/cyg_type.h>
51
#include <cyg/hal/drv_api.h>
52
 
53
typedef enum cyg_mcf52xx_i2c_xfer_mode {
54
    CYG_MCF52xx_I2C_XFER_MODE_INVALID   = 0x00,
55
    CYG_MCF52xx_I2C_XFER_MODE_TX        = 0x01,
56
    CYG_MCF52xx_I2C_XFER_MODE_RX        = 0x02,
57
    CYG_MCF52xx_I2C_XFER_MODE_STARTRX   = 0x03
58
} cyg_mcf52xx_i2c_xfer_mode;
59
 
60
typedef struct cyg_mcf52xx_i2c_extra {
61
#ifdef CYGHWR_DEVS_I2C_MCF52xx_MULTIPLE_BUSES    
62
    // Put statically initialized fields first.
63
    cyg_uint8*                  i2c_base;       // Per-bus h/w details
64
    cyg_vector_t                i2c_isrvec;
65
    int                         i2c_isrpri;
66
    int                         i2c_fdr;
67
#endif    
68
 
69
    cyg_uint8                   i2c_owner;      // We have bus ownership
70
    cyg_uint8                   i2c_lost_arb;   // Error condition leading to loss of bus ownership
71
    cyg_uint8                   i2c_send_nack;  // As per rx send_nack argument
72
    cyg_uint8                   i2c_got_nack;   // The last tx resulted in a nack
73
    cyg_uint8                   i2c_completed;  // Set by DSR, checked by thread
74
 
75
    union {
76
        const cyg_uint8*        i2c_tx_data;
77
        cyg_uint8*              i2c_rx_data;
78
    } i2c_data;                                 // The current buffer for rx or tx
79
    cyg_uint32                  i2c_count;      // Number of bytes left in buffer
80
    cyg_mcf52xx_i2c_xfer_mode   i2c_mode;       // TX, RX, ...
81
 
82
 
83
    cyg_drv_mutex_t             i2c_lock;       // For synchronizing between DSR and foreground
84
    cyg_drv_cond_t              i2c_wait;
85
    cyg_handle_t                i2c_interrupt_handle;   // For initializing the interrupt
86
    cyg_interrupt               i2c_interrupt_data;
87
} cyg_mcf52xx_i2c_extra;
88
 
89
externC void        cyg_mcf52xx_i2c_init(struct cyg_i2c_bus*);
90
externC cyg_uint32  cyg_mcf52xx_i2c_tx(const cyg_i2c_device*, cyg_bool, const cyg_uint8*, cyg_uint32, cyg_bool);
91
externC cyg_uint32  cyg_mcf52xx_i2c_rx(const cyg_i2c_device*, cyg_bool, cyg_uint8*, cyg_uint32, cyg_bool, cyg_bool);
92
externC void        cyg_mcf52xx_i2c_stop(const cyg_i2c_device*);
93
 
94
#ifdef CYGHWR_DEVS_I2C_MCF52xx_MULTIPLE_BUSES
95
# define CYG_MCF52xx_I2C_BUS(_name_, _init_fn_, _base_, _isr_vec_, _isr_pri_, _fdr_)    \
96
    static cyg_mcf52xx_i2c_extra _name_ ## _extra = {                                   \
97
        _base_,                                                                         \
98
        _isr_vec_,                                                                      \
99
        _isr_pri_,                                                                      \
100
        _fdr_                                                                           \
101
    } ;                                                                                 \
102
    CYG_I2C_BUS(_name_,                                                                 \
103
                _init_fn_,                                                              \
104
                &cyg_mcf52xx_i2c_tx,                                                    \
105
                &cyg_mcf52xx_i2c_rx,                                                    \
106
                &cyg_mcf52xx_i2c_stop,                                                  \
107
                (void*) & ( _name_ ## _extra)) ;
108
 
109
#else
110
# define CYG_MCF52xx_I2C_BUS(_name_, _init_fn_, _base_, _isr_vec_, _isr_pri_, _fdr_)    \
111
    static cyg_mcf52xx_i2c_extra _name_ ## _extra;                                      \
112
    CYG_I2C_BUS(_name_,                                                                 \
113
                _init_fn_,                                                              \
114
                cyg_mcf52xx_i2c_tx,                                                     \
115
                cyg_mcf52xx_i2c_rx,                                                     \
116
                cyg_mcf52xx_i2c_stop,                                                   \
117
                (void*) & ( _name_ ## _extra)) ;
118
#endif
119
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.