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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [devs/] [serial/] [freescale/] [esci/] [hdr/] [current/] [include/] [ser_esci.h] - Blame information for rev 810

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1 786 skrzyp
#ifndef CYGONCE_DEVS_SERIAL_FREESCALE_ESCI_H
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#define CYGONCE_DEVS_SERIAL_FREESCALE_ESCI_H
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//==========================================================================
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//
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//      ser_esci.h
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//
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//      Freescale eSCI Serial I/O definitions.
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//
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//==========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):   Ilija Koco <ilijak@siva.com.mk>
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// Contributors:
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// Date:        2006-04-20
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// Purpose:     eSCI Serial I/O definitions.
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// Description: 
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//
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//   
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//####DESCRIPTIONEND####
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//==========================================================================
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// Note: Following macros are platform dependent
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//       and have to be defined in var_io.h or plf_io.h
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//    Macros referenced by serial driver:
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//      CYGADDR_IO_SERIAL_FREESCALE_ESCI_A_BASE
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//      CYGADDR_IO_SERIAL_FREESCALE_ESCI_B_BASE
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//      CYGADDR_IO_SERIAL_FREESCALE_ESCI_C_BASE
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//      CYGADDR_IO_SERIAL_FREESCALE_ESCI_D_BASE
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//      CYGNUM_DEV_SER_FREESCALE_ESCI_SYSTEM_CLOCK
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//      FREESCALE_ESCI_BAUD(baud_rate)
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//    Macros not referenced by serial driver
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//    but by interrupt controller
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//      CYGNUM_IO_SERIAL_FREESCALE_ESCI_A_INT_VECTOR
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//      CYGNUM_IO_SERIAL_FREESCALE_ESCI_B_INT_VECTOR
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//      CYGNUM_IO_SERIAL_FREESCALE_ESCI_C_INT_VECTOR
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//      CYGNUM_IO_SERIAL_FREESCALE_ESCI_D_INT_VECTOR
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//      MAC7100_ESCI_A_IV
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//      MAC7100_ESCI_B_IV
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//      MAC7100_ESCI_C_IV
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//      MAC7100_ESCI_D_IV
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//
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#define FREESCALE_ESCI_A_BASE       (CYGADDR_IO_SERIAL_FREESCALE_ESCI_A_BASE)
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#define FREESCALE_ESCI_B_BASE       (CYGADDR_IO_SERIAL_FREESCALE_ESCI_B_BASE)
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#define FREESCALE_ESCI_C_BASE       (CYGADDR_IO_SERIAL_FREESCALE_ESCI_C_BASE)
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#define FREESCALE_ESCI_D_BASE       (CYGADDR_IO_SERIAL_FREESCALE_ESCI_D_BASE)
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#define FREESCALE_ESCI_A_I  0
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#define FREESCALE_ESCI_B_I  1
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#define FREESCALE_ESCI_C_I  2
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#define FREESCALE_ESCI_D_I  3
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#define FREESCALE_ESCI_BD(esci_base)                    \
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  (esci_base + FREESCALE_ESCI_BD_OFFSET)      //short
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#define FREESCALE_ESCI_CR12(esci_base)                  \
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  (esci_base + FREESCALE_ESCI_CR12_OFFSET)    //short
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#define FREESCALE_ESCI_CR34(esci_base)                  \
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  (esci_base + FREESCALE_ESCI_CR34_OFFSET)    //short
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#define FREESCALE_ESCI_CR1(esci_base)                   \
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  (esci_base + FREESCALE_ESCI_CR1_OFFSET)     //char
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#define FREESCALE_ESCI_CR2(esci_base)                   \
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  (esci_base + FREESCALE_ESCI_CR2_OFFSET)     //char
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#define FREESCALE_ESCI_CR3(esci_base)                   \
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  (esci_base + FREESCALE_ESCI_CR3_OFFSET)     //char
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#define FREESCALE_ESCI_CR4(esci_base)                   \
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  (esci_base + FREESCALE_ESCI_CR4_OFFSET)     //short
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#define FREESCALE_ESCI_LINCTRL(esci_base)               \
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  (esci_base + FREESCALE_ESCI_LINCTRL_OFFSET) //short
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#define FREESCALE_ESCI_LINCRCP(esci_base)               \
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  (esci_base + FREESCALE_ESCI_LINCRCP_OFFSET) //short
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#define FREESCALE_ESCI_SR(esci_base)                    \
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  (esci_base + FREESCALE_ESCI_SR_OFFSET)      //short
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#define FREESCALE_ESCI_DRL(esci_base)                   \
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  (esci_base + FREESCALE_ESCI_DRL_OFFSET)     //char
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#define FREESCALE_ESCI_BD_OFFSET      (0x0000)
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#define FREESCALE_ESCI_CR12_OFFSET    (0x0002)
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#define FREESCALE_ESCI_CR34_OFFSET    (0x0002)
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#define FREESCALE_ESCI_CR1_OFFSET     (0x0002)
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#define FREESCALE_ESCI_CR2_OFFSET     (0x0003)
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#define FREESCALE_ESCI_CR3_OFFSET     (0x0004)
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#define FREESCALE_ESCI_CR4_OFFSET     (0x0005)
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#define FREESCALE_ESCI_DRL_OFFSET     (0x0007)
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#define FREESCALE_ESCI_SR_OFFSET      (0x0008)
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#define FREESCALE_ESCI_LINSTAT_OFFSET (0x000A)
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#define FREESCALE_ESCI_LINCTRL_OFFSET (0x000C)
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#define FREESCALE_ESCI_LINRX_OFFSET   (0x0010)
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#define FREESCALE_ESCI_LINTX_OFFSET   (0x0014)
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#define FREESCALE_ESCI_LINCRCP_OFFSET (0x0018)
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#define FREESCALE_ESCI_CR12_LOOPS     (0x8000)
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#define FREESCALE_ESCI_CR12_SCISDOZ   (0x4000)
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#define FREESCALE_ESCI_CR12_RSRC      (0x2000)
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#define FREESCALE_ESCI_CR12_M         (0x1000)
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#define FREESCALE_ESCI_CR12_WAKE      (0x0800)
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#define FREESCALE_ESCI_CR12_ILT       (0x0400)
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#define FREESCALE_ESCI_CR12_PE        (0x0200)
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#define FREESCALE_ESCI_CR12_PT        (0x0100)
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#define FREESCALE_ESCI_CR12_TIE       (0x0080)
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#define FREESCALE_ESCI_CR12_TCIE      (0x0040)
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#define FREESCALE_ESCI_CR12_RIE       (0x0020)
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#define FREESCALE_ESCI_CR12_ILIE      (0x0010)
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#define FREESCALE_ESCI_CR12_TE        (0x0008)
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#define FREESCALE_ESCI_CR12_RE        (0x0004)
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#define FREESCALE_ESCI_CR12_RWU       (0x0002)
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#define FREESCALE_ESCI_CR12_SBK       (0x0001)
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#define FREESCALE_ESCI_CR3_MDIS       (0x80)
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#define FREESCALE_ESCI_CR3_FBR        (0x40)
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#define FREESCALE_ESCI_CR3_BSTP       (0x20)
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#define FREESCALE_ESCI_CR3_IEBERR     (0x10)
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#define FREESCALE_ESCI_CR3_RXDMA      (0x08)
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#define FREESCALE_ESCI_CR3_TXDMA      (0x04)
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#define FREESCALE_ESCI_CR3_BRK13      (0x02)
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#define FREESCALE_ESCI_CR3_TXDIR      (0x01)
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#define FREESCALE_ESCI_SR_TDRE        (0x8000)
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#define FREESCALE_ESCI_SR_TC          (0x4000)
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#define FREESCALE_ESCI_SR_RDRF        (0x2000)
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#define FREESCALE_ESCI_SR_IDLE        (0x1000)
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#define FREESCALE_ESCI_SR_OR          (0x0800)
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#define FREESCALE_ESCI_SR_NF          (0x0400)
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#define FREESCALE_ESCI_SR_FE          (0x0200)
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#define FREESCALE_ESCI_SR_PF          (0x0100)
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#define FREESCALE_ESCI_SR_BERR        (0x0010)
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#define FREESCALE_ESCI_SR_RAF         (0x0001)
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#endif // CYGONCE_DEVS_SERIAL_FREESCALE_ESCI_H
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// EOF ser_esci.h

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