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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [devs/] [spi/] [arm/] [lpc2xxx/] [current/] [cdl/] [spi_lpc2xxx.cdl] - Blame information for rev 817

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1 786 skrzyp
# ====================================================================
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#
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#      spi_lpc2xxx.cdl
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#
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#      SPI driver for LPC2xxx
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#
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# ====================================================================
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## ####ECOSGPLCOPYRIGHTBEGIN####
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## -------------------------------------------
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## This file is part of eCos, the Embedded Configurable Operating System.
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## Copyright (C) 1998, 1999, 2000, 2001, 2002 ,2009 Free Software Foundation, Inc.
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##
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## eCos is free software; you can redistribute it and/or modify it under
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## the terms of the GNU General Public License as published by the Free
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## Software Foundation; either version 2 or (at your option) any later
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## version.
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##
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## eCos is distributed in the hope that it will be useful, but WITHOUT
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## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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## for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with eCos; if not, write to the Free Software Foundation, Inc.,
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## 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
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##
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## As a special exception, if other files instantiate templates or use
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## macros or inline functions from this file, or you compile this file
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## and link it with other works to produce a work based on this file,
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## this file does not by itself cause the resulting work to be covered by
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## the GNU General Public License. However the source code for this file
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## must still be made available in accordance with section (3) of the GNU
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## General Public License v2.
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##
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## This exception does not invalidate any other reasons why a work based
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## on this file might be covered by the GNU General Public License.
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## -------------------------------------------
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## ####ECOSGPLCOPYRIGHTEND####
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# ====================================================================
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######DESCRIPTIONBEGIN####
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#
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# Author(s):      Hans Rosenfeld 
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# Contributors:
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# Date:           2007-07-12
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#
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#####DESCRIPTIONEND####
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#
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# ====================================================================
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cdl_package CYGPKG_DEVS_SPI_ARM_LPC2XXX {
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    display     "LPC2xxx SPI driver"
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    requires    CYGPKG_HAL_ARM_LPC2XXX
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    parent      CYGPKG_IO_SPI
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    active_if   CYGPKG_IO_SPI
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    include_dir cyg/io
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    compile     spi_lpc2xxx.cxx
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    cdl_component CYGPKG_DEVS_SPI_ARM_LPC2XXX_BUS0 {
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        display       "Enable SPI interface 0"
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        flavor        bool
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        default_value 1
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        description   "The LPC2xxx controllers contain two SPI interfaces.
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                       Enable this component to get support for SPI
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                       interface 0."
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        cdl_option CYGNUM_IO_SPI_ARM_LPC2XXX_BUS0_INTPRIO {
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            display       "Interrupt priority of the SPI bus 0 ISR"
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            flavor        data
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            legal_values  0 to 15
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            default_value 12
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            requires      { is_active(CYGNUM_IO_SPI_ARM_LPC2XXX_BUS1_INTPRIO)
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                             implies (CYGNUM_IO_SPI_ARM_LPC2XXX_BUS0_INTPRIO !=
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                             CYGNUM_IO_SPI_ARM_LPC2XXX_BUS1_INTPRIO)
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            }
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            description "
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                This option specifies the interrupt priority of the ISR of
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                the SPI bus 0 interrupt in the VIC. Slot 0 has the highest
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                priority and slot 15 the lowest."
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        }
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    }
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    cdl_component CYGPKG_DEVS_SPI_ARM_LPC2XXX_BUS1 {
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        display       "Enable SPI interface 1"
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        flavor        bool
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        default_value 1
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        description   "The LPC2xxx controllers contain two SPI interfaces.
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                       Enable this component to get support for SPI
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                       interface 1."
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        cdl_option CYGNUM_IO_SPI_ARM_LPC2XXX_BUS1_INTPRIO {
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            display       "Interrupt priority of the SPI bus 1 ISR"
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            flavor        data
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            legal_values  0 to 15
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            default_value 13
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            description "
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                This option specifies the interrupt priority of the ISR of
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                the SPI bus 1 interrupt in the VIC. Slot 0 has the highest
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                priority and slot 15 the lowest."
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        }
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    }
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}

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