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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [devs/] [spi/] [opencores/] [simple_spi/] [current/] [include/] [spi_simple_spi.h] - Blame information for rev 810

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1 810 skrzyp
#ifndef CYGONCE_DEVS_SPI_OPENCORES_SIMPLE_SPI_H
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#define CYGONCE_DEVS_SPI_OPENCORES_SIMPLE_SPI_H
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//=============================================================================
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//
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//      spi_simple_spi.h
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//
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//      Header definitions for simple_spi driver.
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 2008, 2009 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):   Piotr Skrzypek
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// Date:        2012-05-14
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//
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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#include <pkgconf/hal.h>
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#include <pkgconf/io_spi.h>
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#include <pkgconf/devs_spi_opencores_simple_spi.h>
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#include <cyg/infra/cyg_type.h>
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#include <cyg/hal/drv_api.h>
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#include <cyg/io/spi.h>
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// Use this macro in your code to declare SPI devices.
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//
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// _name_ name of the handler variable that must be passed on each call 
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//        to eCos SPI API
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//
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// _bus_ SPI bus number to which the device is attached;
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//       numbers start from zero
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//
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// _cs_ number of the chip select line on the bus;
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//      numbers start from zero
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//
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// _polarity_ SPI polarity
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//
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// _phase_ SPI phase
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//
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// _freq_ SCK frequency in Hertz
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//
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// _cs_to_tran_ minimum delay between chip select and transfer, in us
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//
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// _tran_to_cs_ minimum delay between transfer and chip deselect, in us
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//
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// _tran_to_tran_ minimum delay between transfers, in us
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#define CYG_DEVS_SPI_OPENCORES_SIMPLE_SPI_DEVICE(_name_,         \
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                                                 _bus_,          \
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                                                 _cs_,           \
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                                                 _polarity_,     \
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                                                 _phase_,        \
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                                                 _freq_,         \
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                                                 _cs_to_tran_,   \
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                                                 _tran_to_cs_,   \
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                                                 _tran_to_tran_) \
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                                                                 \
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        cyg_spi_opencores_simple_spi_device_t _name_ ##_simple_spi CYG_SPI_DEVICE_ON_BUS(_bus_) = { \
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        .spi_device = {                                                                             \
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                .spi_bus = (cyg_spi_bus*) &cyg_spi_simple_spi_bus[_bus_]                            \
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        },                                                                                          \
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        .cs = _cs_,                                                                                 \
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        .polarity = _polarity_,                                                                     \
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        .phase = _phase_,                                                                           \
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        .freq = _freq_,                                                                             \
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        .cs_to_tran = _cs_to_tran_,                                                                 \
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        .tran_to_cs = _tran_to_cs_,                                                                 \
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        .tran_to_tran = _tran_to_tran_,                                                             \
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        };                                                                                          \
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        extern cyg_spi_device _name_ __attribute__((alias ( #_name_ "_simple_spi" )));
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typedef struct {
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        // Upper layer
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        cyg_spi_device spi_device;
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        // Private data
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        cyg_uint8 cs;
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        cyg_uint8 polarity;
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        cyg_uint8 phase;
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        cyg_uint32 freq;
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        cyg_uint16 cs_to_tran;
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        cyg_uint16 tran_to_cs;
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        cyg_uint16 tran_to_tran;
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} cyg_spi_opencores_simple_spi_device_t;
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typedef struct {
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        // Upper layer callbacks
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        cyg_spi_bus spi_bus;
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        // Private data
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        cyg_uint32 base_addr;
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        cyg_interrupt int_data;
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        cyg_handle_t int_handle;
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        cyg_drv_mutex_t mutex;
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        cyg_drv_cond_t condvar;
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        // State data
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        cyg_bool cs_asserted;
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} cyg_spi_opencores_simple_spi_bus_t;
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externC cyg_spi_opencores_simple_spi_bus_t cyg_spi_simple_spi_bus[];
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//=============================================================================
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#endif // CYGONCE_DEVS_SPI_OPENCORES_SIMPLE_SPI_H

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