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skrzyp |
<!-- Copyright (C) 2001 Free Software Foundation, Inc. -->
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<!-- This material may be distributed only subject to the terms -->
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<!-- and conditions set forth in the Open Publication License, v1.0 -->
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<!-- or later (the latest version is presently available at -->
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<!-- http://www.opencontent.org/openpub/) -->
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<!-- Distribution of substantively modified versions of this -->
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<!-- document is prohibited without the explicit permission of the -->
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<!-- copyright holder. -->
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<!-- Distribution of the work or derivative of the work in any -->
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<!-- standard (paper) book form is prohibited unless prior -->
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<!-- permission obtained from the copyright holder -->
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<HTML>
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<HEAD>
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<TITLE>
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SA11X0 USB Device Driver</TITLE>
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<META
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NAME="GENERATOR"
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CONTENT="Modular DocBook HTML Stylesheet Version 1.54"></HEAD>
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<BODY
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CLASS="REFENTRY"
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BGCOLOR="#FFFFFF"
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TEXT="#000000"
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LINK="#0000FF"
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VLINK="#840084"
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ALINK="#0000FF">
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<H1>
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<A
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NAME="DEVS-USB-SA11X0">
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SA11X0 USB Device Driver</A>
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</H1>
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<DIV
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CLASS="REFNAMEDIV">
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<A
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NAME="AEN4">
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</A>
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<H2>
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Name</H2>
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SA11X0 USB Support -- Device driver for the on-chip SA11X0 USB device</DIV>
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<DIV
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CLASS="REFSECT1">
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<A
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NAME="AEN7">
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</A>
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<H2>
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SA11X0 USB Hardware</H2>
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<P>
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The Intel StrongARM SA11x0 family of processors is supplied with an
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on-chip USB slave device, the UDC (USB Device Controller). This
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supports three endpoints. Endpoint 0 can only be used for control
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messages. Endpoint 1 can only be used for bulk transfers from host to
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peripheral. Endpoint 2 can only be used for bulk transfers from
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peripheral to host. Isochronous and interrupt transfers are not
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supported.</P>
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<DIV
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CLASS="CAUTION">
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<P>
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</P>
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<TABLE
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CLASS="CAUTION"
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BORDER="1"
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WIDTH="100%">
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<TR>
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<TD
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ALIGN="CENTER">
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<B>
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Caution</B>
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</TD>
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</TR>
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<TR>
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<TD
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ALIGN="LEFT">
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<P>
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Different revisions of the SA11x0 silicon have had various problems
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with the USB support. The device driver has been tested primarily
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against stepping B4 of the SA1110 processor, and may not function as
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expected with other revisions. Application developers should obtain
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the manufacturer's current errata sheets and specification updates.
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The B4 stepping still has a number of problems, but the device driver
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can work around these. However there is a penalty in terms of extra
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code, extra cpu cycles, and increased dispatch latency because extra
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processing is needed at DSR level. Interrupt latency should not be
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affected.</P>
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<P>
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There is one specific problem inherent in the UDC design of which
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application developers should be aware: the hardware cannot fully
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implement the USB standard for bulk transfers. A bulk transfer
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typically consists of some number of full-size 64-byte packets and is
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terminated by a packet less than the full size. If the amount of data
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transferred is an exact multiple of 64 bytes then this requires a
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terminating packet of 0 bytes of data (plus header and checksum). The
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SA11x0 USB hardware does not allow a 0-byte packet to be transmitted,
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so the device driver is forced to substitute a 1-byte packet and the
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host receives more data than expected. Protocol support is needed so
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that the appropriate host-side device driver can allow buffer space
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for the extra byte, detect when it gets sent, and discard it.
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Consequently certain standard USB class protocols cannot be
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implemented using the SA11x0, and therefore custom host-side device
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drivers will generally have to be provided, rather than re-using
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existing ones that understand the standard protocol.</P>
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</TD>
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</TR>
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</TABLE>
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</DIV>
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</DIV>
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<DIV
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CLASS="REFSECT1">
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<A
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NAME="AEN13">
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</A>
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<H2>
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Endpoint Data Structures</H2>
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<P>
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The SA11x0 USB device driver can provide up to three data structures
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corresponding to the three endpoints: a
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<SPAN
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CLASS="STRUCTNAME">
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usbs_control_endpoint</SPAN>
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structure
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<TT
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CLASS="LITERAL">
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usbs_sa11x0_ep0</TT>
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; a
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<SPAN
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CLASS="STRUCTNAME">
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usbs_rx_endpoint</SPAN>
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<TT
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CLASS="LITERAL">
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usbs_sa11x0_ep1</TT>
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; and a
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<SPAN
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CLASS="STRUCTNAME">
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usbs_tx_endpoint</SPAN>
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<TT
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CLASS="LITERAL">
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usbs_sa11x0_ep2</TT>
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. The header file
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<TT
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CLASS="FILENAME">
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cyg/io/usb/usbs_sa11x0.h</TT>
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provides declarations for these.</P>
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<P>
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Not all applications will require support for all the endpoints. For
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example, if the intended use of the UDC only involves peripheral to
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host transfers then <TT
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CLASS="LITERAL">
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usbs_sa11x0_ep1</TT>
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is redundant.
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The device driver provides configuration options to control the
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presence of each endpoint:</P>
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<P>
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</P>
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<OL
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TYPE="1">
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<LI>
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<P>
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Endpoint 0 is controlled by
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<TT
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CLASS="LITERAL">
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CYGFUN_DEVS_USB_SA11X0_EP0</TT>
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. This defaults to
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enabled if there are any higher-level packages that require USB
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hardware or if the global preference
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<TT
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CLASS="LITERAL">
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CYGGLO_IO_USB_SLAVE_APPLICATION</TT>
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is enabled,
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otherwise it is disabled. Usually this has the desired effect. It may
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be necessary to override this in special circumstances, for example if
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the target board uses an external USB chip in preference to the UDC
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and it is that external chip's device driver that should be used
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rather than the on-chip UDC. It is not possible to disable endpoint 0
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and at the same time enable one or both of the other endpoints, since
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a USB device is only usable if it can process the standard control
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messages.</P>
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</LI>
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<LI>
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<P>
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Endpoint 1 is controlled by
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<TT
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CLASS="LITERAL">
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CYGPKG_DEVS_USB_SA11X0_EP1</TT>
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. By default it is
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enabled whenever endpoint 0 is enabled, but it can be disabled
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manually when not required.</P>
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</LI>
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<LI>
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<P>
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Similarly endpoint 2 is controlled by
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<TT
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CLASS="LITERAL">
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CYGPKG_DEVS_USB_SA11X0_EP2</TT>
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. This is also enabled by
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default whenever endpoint 0 is enabled, but it can be disabled manually.</P>
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</LI>
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</OL>
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<P>
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The SA11X0 USB device driver implements the interface specified by the
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common eCos USB Slave Support package. The documentation for that
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package should be consulted for further details. There is only one
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major deviation: when there is a peripheral to host transfer on
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endpoint 2 which is an exact multiple of the bulk transfer packet size
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(usually 64 bytes) the device driver has to pad the transfer with one
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extra byte. This is because of a hardware limitation: the UDC is
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incapable of transmitting 0-byte packets as required by the USB
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specification. Higher-level code, including the host-side device
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driver, needs to be aware of this and adapt accordingly.</P>
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<P>
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The device driver assumes a bulk packet size of 64 bytes, so this
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value should be used in the endpoint descriptors in the enumeration
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data provided by application code. There is experimental code
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for running with <A
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HREF="devs-usb-sa11x0.html#AEN58">
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DMA disabled</A>
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,
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in which case the packet size will be 16 bytes rather than 64.</P>
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</DIV>
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<DIV
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CLASS="REFSECT1">
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<A
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NAME="AEN39">
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</A>
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<H2>
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Devtab Entries</H2>
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<P>
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In addition to the endpoint data structures the SA11X0 USB device
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driver can also provide devtab entries for each endpoint. This allows
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higher-level code to use traditional I/O operations such as
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<TT
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CLASS="FUNCTION">
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open</TT>
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/<TT
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CLASS="FUNCTION">
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read</TT>
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/<TT
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CLASS="FUNCTION">
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write</TT>
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rather than the USB-specific non-blocking functions like
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<TT
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CLASS="FUNCTION">
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usbs_start_rx_buffer</TT>
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. These devtab entries are
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optional since they are not always required. The relevant
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configuration options are
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<TT
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CLASS="LITERAL">
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CYGVAR_DEVS_USB_SA11X0_EP0_DEVTAB_ENTRY</TT>
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,
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<TT
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CLASS="LITERAL">
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CYGVAR_DEVS_USB_SA11X0_EP1_DEVTAB_ENTRY</TT>
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and
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<TT
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CLASS="LITERAL">
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CYGVAR_DEVS_USB_SA11X0_EP2_DEVTAB_ENTRY</TT>
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. By default
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these devtab entries are provided if the global preference
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<TT
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CLASS="LITERAL">
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CYGGLO_USB_SLAVE_PROVIDE_DEVTAB_ENTRIES</TT>
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is enabled,
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which is usually the case. Obviously a devtab entry for a given
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endpoint will only be provided if the underlying endpoint is enabled.
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For example, there will not be a devtab entry for endpoint 1 if
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<TT
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CLASS="LITERAL">
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CYGPKG_DEVS_USB_SA11X0_EP1</TT>
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is disabled.</P>
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<P>
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The names for the three devtab entries are determined by using a
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configurable base name and appending <TT
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CLASS="LITERAL">
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0c</TT>
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,
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<TT
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CLASS="LITERAL">
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1r</TT>
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or <TT
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CLASS="LITERAL">
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2w</TT>
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. The base name is
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determined by the configuration option
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<TT
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CLASS="LITERAL">
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CYGDAT_DEVS_USB_SA11X0_DEVTAB_BASENAME</TT>
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and has a
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default value of <TT
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CLASS="LITERAL">
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/dev/usbs</TT>
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, so the devtab entry for
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endpoint 1 would default to <TT
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CLASS="LITERAL">
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/dev/usbs1r</TT>
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. If the
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target hardware involves multiple USB devices then application
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developers may have to change the base name to prevent a name clash.</P>
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</DIV>
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<DIV
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CLASS="REFSECT1">
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<A
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NAME="AEN58">
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</A>
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| 306 |
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<H2>
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| 307 |
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DMA Engines</H2>
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| 308 |
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<P>
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| 309 |
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The SA11X0 UDC provides only limited fifos for bulk transfers on
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endpoints 1 and 2; smaller than the normal 64-byte bulk packet size.
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Therefore a typical transfer requires the use of DMA engines. The
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SA11x0 provides six DMA engines that can be used for this, and the
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endpoints require one each (assuming both endpoints are enabled). At
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the time of writing there is no arbitration mechanism to control
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access to the DMA engines. By default the device driver will use
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DMA engine 4 for endpoint 1 and DMA engine 5 for endpoint 2, and it
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assumes that no other code uses these particular engines.</P>
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<P>
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The exact DMA engines that will be used are determined by the
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configuration options
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<TT
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| 322 |
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CLASS="LITERAL">
|
| 323 |
|
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CYGNUM_DEVS_USB_SA11X0_EP1_DMA_CHANNEL</TT>
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| 324 |
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and
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| 325 |
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<TT
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| 326 |
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CLASS="LITERAL">
|
| 327 |
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CYGNUM_DEVS_USB_SA11X0_EP2_DMA_CHANNEL</TT>
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| 328 |
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. These
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options have the booldata flavor, allowing the use of DMA to be
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disabled completely in addition to controlling which DMA engines are
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used. If DMA is disabled then the device driver will attempt to
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work purely using the fifos, and the packet size will be limited to
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only 16 bytes. This limit should be reflected in the appropriate
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endpoint descriptors in the enumeration data. The code for driving the
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endpoints without DMA should be considered experimental. At best it
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will be suitable only for applications where the amount of data
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transferred is relatively small, because four times as many interrupts
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will be raised and performance will suffer accordingly.</P>
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</DIV>
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</BODY>
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</HTML>
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