OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [devs/] [wallclock/] [arm/] [lpc2xxx/] [current/] [ChangeLog] - Blame information for rev 857

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 786 skrzyp
2011-01-15  Ilija Kocho  
2
 
3
        * cdl/lpc2xxx_wallclock.cdl:
4
        * src/lpc2xxx_wallclock.cxx: Added support for LPC17XX CPUs.
5
 
6
2008-11-01  Uwe Kindler 
7
 
8
        * cdl/lpc2xxx_wallclock.cdl: Moved CYGNUM_HAL_ARM_LPC2XXX_RTCDEV_PREINT
9
          and CYGNUM_HAL_ARM_LPC2XXX_RTCDEV_PREFRAC to lpc2xxx_wallclock.cxx
10
        * src/lpc2xxx_wallclock.cxx: Some small changes to support LPC24xx
11
          devices
12
 
13
2007-07-12  Hans Rosenfeld  
14
 
15
        * lpc2xxx: driver for on-chip RTC unit
16
 
17
//===========================================================================
18
// ####GPLCOPYRIGHTBEGIN####
19
// -------------------------------------------
20
// This file is part of eCos, the Embedded Configurable Operating System.
21
// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
22
//
23
// This program is free software; you can redistribute it and/or modify
24
// it under the terms of the GNU General Public License as published by
25
// the Free Software Foundation; either version 2 or (at your option) any
26
// later version.
27
//
28
// This program is distributed in the hope that it will be useful, but
29
// WITHOUT ANY WARRANTY; without even the implied warranty of
30
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
31
// General Public License for more details.
32
//
33
// You should have received a copy of the GNU General Public License
34
// along with this program; if not, write to the
35
// Free Software Foundation, Inc., 51 Franklin Street,
36
// Fifth Floor, Boston, MA  02110-1301, USA.
37
// -------------------------------------------
38
// ####GPLCOPYRIGHTEND####
39
//===========================================================================
40
 
41
 

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.