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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [arm/] [aim711/] [current/] [include/] [hal_platform_setup.h] - Blame information for rev 786

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1 786 skrzyp
#ifndef CYGONCE_HAL_PLATFORM_SETUP_H
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#define CYGONCE_HAL_PLATFORM_SETUP_H
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//==========================================================================
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//
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//      hal_platform_setup.h
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//
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//      
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//
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//==========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    gthomas
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// Contributors: gthomas, jskov, rcassebohm
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//               Grant Edwards <grante@visi.com>
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// Date:         2001-07-31
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// Purpose:      
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// Description:  
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//
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//####DESCRIPTIONEND####
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//
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//========================================================================*/
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#include <cyg/hal/plf_io.h>
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        .macro LED_MACRO x
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        ldr     r0,=KS32C_IOPDATA
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        ldr     r1,[r0]
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        and     r1,r1,#(~0x7) 
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        orr     r1,r1,#((0x7 & (~(\x)))) 
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        str     r1,[r0]
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#ifdef CYGSEM_HAL_LED_WITH_DELAY 
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        ldr     r1,=0x80000
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1:      sub     r1,r1,#1 
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        cmp     r1,#0 
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        bne     1b
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#endif 
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        .endm
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#define CYGHWR_LED_MACRO                                                 \
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        LED_MACRO (\x)
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// Use relative branch since we are going to switch the address space
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// around.
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#define CYGSEM_HAL_ROM_RESET_USES_JUMP
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        .macro  PLATFORM_RELOCATE
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        ldr     r1,=KS32C_IOPMOD
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        ldr     r2,=0x07 /* set led display to output */
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        str     r2,[r1]
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        LED 0x0
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        /* Check that it worked, otherwise try Sync DRAM setup */
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        ldr     r1,=0x00000000
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        str     r1,[r1]
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        ldr     r2,[r1]
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        cmp     r2,r1
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        beq     99f
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        /* Sync DRAM mode */
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        LED 0x1
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        ldr     r3, =0xe7ffff90 /* sdram c+wb disabled, regs @ 0x03ff0000 */
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        ldr     r0, =KS32C_SYSCFG
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        str     r3,[r0]
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1:      mov     r1,pc           /* actual address  */
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        sub     r1,r1,#8        /* + 8 */
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        ldr     r0,=1b          /* address off 1: after remap */
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        sub     r1,r1,r0
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        ldr     r0,=40f
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        add     r0,r0,r1
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#ifdef CYG_HAL_STARTUP_ROMRAM
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        ldr     lr,=4f
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        add     lr,lr,r1
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        ldr     r1,=AIM711_ROM0_LA_START
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        add     lr,lr,r1
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#else
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        ldr     lr,=99f
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#endif
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        ldmia   r0,{r1-r12}
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        ldr     r0,=KS32C_EXTDBWTH
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        stmia   r0,{r1-r12}
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        mov     pc,lr
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#ifdef CYG_HAL_STARTUP_ROMRAM
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4:
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        /* Relocate text segment */
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        ldr     r2,=__exception_handlers
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        ldr     r3,=AIM711_ROM0_LA_START
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        cmp     r2,r3
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        beq     6f
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        ldr     r4,=__rom_data_end
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5:
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        ldr     r0,[r3],#4
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        str     r0,[r2],#4
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        cmp     r2,r4
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        bne     5b
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6:
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        ldr     lr,=99f
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        mov     pc,lr
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        nop
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        nop
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        nop
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#endif
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        /* The below are set with a store-multiple instruction */
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        /* Sync DRAM setup */
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        /* Flash is 8 bit, DRAM is 32 bit and EXTIO is 8 bit */
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        /* .long   KS32C_EXTDBWTH */
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40:     .long  ( (KS32C_EXTDBWTH_8BIT<<KS32C_EXTDBWTH_DSR0_shift)          \
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                |(KS32C_EXTDBWTH_32BIT<<KS32C_EXTDBWTH_DSD0_shift)         \
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                |(KS32C_EXTDBWTH_8BIT<<KS32C_EXTDBWTH_DSX0_shift)          \
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                |(KS32C_EXTDBWTH_8BIT<<KS32C_EXTDBWTH_DSX2_shift) )
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        /* Flash at 0x02000000-0x02100000, 5 cycles, 7 cycles */
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        /* .long   KS32C_ROMCON0 */
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        .long  ( (KS32C_ROMCON_PMC_ROM)                                    \
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                |(KS32C_ROMCON_TPA_5C)                                     \
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                |(KS32C_ROMCON_TACC_7C)                                    \
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                |((AIM711_ROM0_LA_START >> 16) << KS32C_ROMCON_BASE_shift)           \
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                |((AIM711_ROM0_LA_END >> 16) << KS32C_ROMCON_NEXT_shift))
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        /* .long   KS32C_ROMCON1 */
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        .long  ( (KS32C_ROMCON_PMC_ROM)                                    \
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                |(KS32C_ROMCON_TPA_5C)                                     \
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                |(KS32C_ROMCON_TACC_5C)                                    \
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                |((0x00000000 >> 16) << KS32C_ROMCON_BASE_shift)           \
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                |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift))
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        /* .long   KS32C_ROMCON2 */
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        .long  ( (KS32C_ROMCON_PMC_ROM)                                    \
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                |(KS32C_ROMCON_TPA_5C)                                     \
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                |(KS32C_ROMCON_TACC_5C)                                    \
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                |((0x00000000 >> 16) << KS32C_ROMCON_BASE_shift)           \
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                |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift))
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        /* .long   KS32C_ROMCON3 */
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        .long  ( (KS32C_ROMCON_PMC_ROM)                                    \
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                |(KS32C_ROMCON_TPA_5C)                                     \
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                |(KS32C_ROMCON_TACC_5C)                                    \
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                |((0x00000000 >> 16) << KS32C_ROMCON_BASE_shift)           \
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                |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift))
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        /* .long   KS32C_ROMCON4 */
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        .long  ( (KS32C_ROMCON_PMC_ROM)                                    \
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                |(KS32C_ROMCON_TPA_5C)                                     \
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                |(KS32C_ROMCON_TACC_5C)                                    \
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                |((0x00000000 >> 16) << KS32C_ROMCON_BASE_shift)           \
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                |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift))
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        /* .long   KS32C_ROMCON5 */
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        .long  ( (KS32C_ROMCON_PMC_ROM)                                    \
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                |(KS32C_ROMCON_TPA_5C)                                     \
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                |(KS32C_ROMCON_TACC_5C)                                    \
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                |((0x00000000 >> 16) << KS32C_ROMCON_BASE_shift)           \
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                |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift))
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        /* .long   KS32C_DRAMCON0 */
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        .long  ( (KS32C_DRAMCON_RESERVED)                                  \
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                |(KS32C_DRAMCON_CAN_8)                                     \
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                |(KS32C_DRAMCON_TRP_4C)                                    \
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                |(KS32C_DRAMCON_TRC_2C)                                    \
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                |((AIM711_DRAM_LA_START >> 16) << KS32C_DRAMCON_BASE_shift)          \
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                |((AIM711_DRAM_LA_END >> 16) << KS32C_DRAMCON_NEXT_shift))
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        /* .long   KS32C_DRAMCON1 */
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        .long  ( (KS32C_DRAMCON_RESERVED)                                  \
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                |(KS32C_DRAMCON_CAN_8)                                     \
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                |(KS32C_DRAMCON_TRP_2C)                                    \
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                |(KS32C_DRAMCON_TRC_2C)                                    \
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                |((0x00000000 >> 16) << KS32C_DRAMCON_BASE_shift)          \
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                |((0x00000000 >> 16) << KS32C_DRAMCON_NEXT_shift))
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        /* .long   KS32C_DRAMCON2 */
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        .long  ( (KS32C_DRAMCON_RESERVED)                                  \
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                |(KS32C_DRAMCON_CAN_8)                                     \
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                |(KS32C_DRAMCON_TRP_2C)                                    \
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                |(KS32C_DRAMCON_TRC_2C)                                    \
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                |((0x00000000 >> 16) << KS32C_DRAMCON_BASE_shift)          \
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                |((0x00000000 >> 16) << KS32C_DRAMCON_NEXT_shift))
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        /* .long   KS32C_DRAMCON3 */
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        .long  ( (KS32C_DRAMCON_RESERVED)                                  \
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                |(KS32C_DRAMCON_CAN_8)                                     \
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                |(KS32C_DRAMCON_TRP_2C)                                    \
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                |(KS32C_DRAMCON_TRC_2C)                                    \
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                |((0x00000000 >> 16) << KS32C_DRAMCON_BASE_shift)          \
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                |((0x00000000 >> 16) << KS32C_DRAMCON_NEXT_shift))
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        /* .long   KS32C_REFEXTCON */
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        .long  (((2048+1-(8*CYGNUM_HAL_CPUCLOCK/1000000)) << KS32C_REFEXTCON_RCV_shift) \
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                 |(KS32C_REFEXTCON_TRC_4C)                                 \
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                 |(KS32C_REFEXTCON_REN)                                    \
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                 |(KS32C_REFEXTCON_VSF)                                    \
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                 |(AIM711_EXT0_LA_START >> 16) )
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#if 0
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50:
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        .long   0x07113001 /* ROM half-word, RAM word, EXT-IO */
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        .long   0x21080060 /* ROM 32 - 33 MByte */
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        .long   0
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        .long   0
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        .long   0
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        .long   0
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        .long   0
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        .long   0x0800038e /* RAM 0 - 8 MByte */
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        .long   0
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        .long   0
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        .long   0
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        .long   0xc01583fd /* Reactivate external Bus */
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#endif
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99:     LED 0x2
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        ldr     r3,=0x00000000
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        str     r3,[r3]
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        ldr     r4,[r3]
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        cmp     r4,r3
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        beq     15f
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11:     LED 0x3
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        b 11b
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15:     LED 0x4
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        .endm
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#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
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#define PLATFORM_SETUP1                                                    \
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        PLATFORM_RELOCATE
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#else
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#define PLATFORM_SETUP1
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#endif
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//-----------------------------------------------------------------------------
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// end of hal_platform_setup.h
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#endif // CYGONCE_HAL_PLATFORM_SETUP_H

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