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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [arm/] [arch/] [current/] [include/] [hal_mmu.h] - Blame information for rev 856

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1 786 skrzyp
#ifndef CYGONCE_HAL_MMU_H
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#define CYGONCE_HAL_MMU_H
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//==========================================================================
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//
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//      hal_mmu.h
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//
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//      MMU definitions
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//
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//==========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    gthomas
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// Contributors: gthomas
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// Date:         1999-05-10
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// Purpose:      Define MMU for ARM
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// Usage:        #include <cyg/hal/hal_mmu.h>
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//              
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#define MMU_L1_TYPE         0x03  // Descriptor type
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#define MMU_L1_TYPE_Fault   0x00  // Invalid
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#define MMU_L1_TYPE_Page    0x11  // Individual page mapping
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#define MMU_L1_TYPE_Section 0x12  // Mapping for 1M segment
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#define MMU_L2_TYPE         0x03  // Descriptor type
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#define MMU_L2_TYPE_Fault   0x00  // Invalid data
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#define MMU_L2_TYPE_Large   0x01  // Large page (64K)
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#define MMU_L2_TYPE_Small   0x02  // Small page (4K)
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#define MMU_Bufferable      0x04  // Data can use write-buffer
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#define MMU_Cacheable       0x08  // Data can use cache
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#define MMU_AP_Limited     0x000  // Limited access
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#define MMU_AP_Supervisor  0x400  // Supervisor RW, User none
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#define MMU_AP_UserRead    0x800  // Supervisor RW, User read only
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#define MMU_AP_Any         0xC00  // Supervisor RW, User RW
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#define MMU_AP_ap0_Any     0x030
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#define MMU_AP_ap1_Any     0x0C0
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#define MMU_AP_ap2_Any     0x300
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#define MMU_AP_ap3_Any     0xC00
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#define MMU_AP_All (MMU_AP_ap0_Any|MMU_AP_ap1_Any|MMU_AP_ap2_Any|MMU_AP_ap3_Any)
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#define MMU_DOMAIN(x)      ((x)<<5)
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#define MMU_PAGE_SIZE      0x1000
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#define MMU_SECTION_SIZE   0x100000
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#define MMU_CP               p15      // Co-processor ID 
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#define MMU_Control          c1       // Control register
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#define MMU_Base             c2       // Page tables base
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#define MMU_DomainAccess     c3       // Domain access control
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#define MMU_FaultStatus      c5       // Fault status register
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#define MMU_FaultAddress     c6       // Fault Address
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#define MMU_InvalidateCache  c7       // Invalidate cache data
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#define MMU_TLB              c8       // Translation Lookaside Buffer
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// These seem to be 710 specific
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#define MMU_FlushTLB         c5
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#define MMU_FlushIDC         c7
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#define MMU_Control_M  0x001    // Enable MMU
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#define MMU_Control_A  0x002    // Enable address alignment faults
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#define MMU_Control_C  0x004    // Enable cache
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#define MMU_Control_W  0x008    // Enable write-buffer
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#define MMU_Control_P  0x010    // Compatability: 32 bit code
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#define MMU_Control_D  0x020    // Compatability: 32 bit data
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#define MMU_Control_L  0x040    // Compatability:
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#define MMU_Control_B  0x080    // Enable Big-Endian
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#define MMU_Control_S  0x100    // Enable system protection
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#define MMU_Control_R  0x200    // Enable ROM protection
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#define MMU_Control_I  0x1000   // Enable Instruction cache
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#define MMU_Control_X  0x2000   // Set interrupt vectors at 0xFFFF0000
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#define MMU_Control_Init (MMU_Control_P|MMU_Control_D|MMU_Control_L)
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// Extras for some newer versions eg. ARM920 with architecture version 4.
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#define MMU_Control_F  0x400    // IMPLEMENTATION DEFINED
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#define MMU_Control_Z  0x800    // Enable branch predicion
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#define MMU_Control_RR 0x4000   // Select non-random cache replacement
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//-----------------------------------------------------------------------------
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#endif // CYGONCE_HAL_MMU_H
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// End of hal_mmu.h

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