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#      hal_arm_arm9.cdl

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#      ARM Arm9 architectural HAL package configuration data

#

# ====================================================================

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# ====================================================================

######DESCRIPTIONBEGIN####

#

# Author(s):      gthomas

# Contributors:   jskov

# Date:           2000-11-10

#

#####DESCRIPTIONEND####

#

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cdl_package CYGPKG_HAL_ARM_ARM9 {

    display       "ARM ARM9 architecture"

    parent        CYGPKG_HAL_ARM

    hardware

    include_dir   cyg/hal

    define_header hal_arm_arm9.h

    description   "

        This HAL variant package provides generic

        support for the ARM ARM9 processors. It is also

        necessary to select a specific target platform HAL

        package."

    implements    CYGINT_HAL_ARM_ARCH_ARM9

    compile       arm9_misc.c

    define_proc {

        puts $::cdl_system_header "#define CYGBLD_HAL_ARM_VAR_IO_H"

    }

    cdl_interface CYGINT_HAL_ARM_ARM9_VARIANT {

        display  "Number of variant implementations in this configuration"

        no_define

        requires 1 == CYGINT_HAL_ARM_ARM9_VARIANT

    }

    # CPU variant supported

    cdl_option CYGPKG_HAL_ARM_ARM9_ARM920T {

        display       "ARM ARM920T microprocessor"

        implements    CYGINT_HAL_ARM_ARM9_VARIANT

        default_value 0

        no_define

        define        -file=system.h CYGPKG_HAL_ARM_ARM9_ARM920T

        description "

            The ARM920T has 16k data cache, 16k instruction cache, 16 word

            write buffer and an MMU."

    }

    cdl_option CYGPKG_HAL_ARM_ARM9_ARM922T {

        display       "ARM ARM922T microprocessor"

        implements    CYGINT_HAL_ARM_ARM9_VARIANT

        default_value 0

        no_define

        define        -file=system.h CYGPKG_HAL_ARM_ARM9_ARM922T

        description "

            The ARM922T has 8k data cache, 8k instruction cache, 16 word

            write buffer and an MMU."

    }

    cdl_option CYGPKG_HAL_ARM_ARM9_ARM925T {

        display       "ARM ARM925T microprocessor"

        implements    CYGINT_HAL_ARM_ARM9_VARIANT

        default_value 0

        no_define

        define        -file=system.h CYGPKG_HAL_ARM_ARM9_ARM925T

        description "

            The ARM925T has 8k data cache, 16k instruction cache, 16 word

            write buffer and an MMU."

    }

    cdl_option CYGPKG_HAL_ARM_ARM9_ARM926EJ {

        display       "ARM ARM926EJ microprocessor"

        implements    CYGINT_HAL_ARM_ARM9_VARIANT

        default_value 0

        no_define

        define        -file=system.h CYGPKG_HAL_ARM_ARM9_ARM926EJ

        description "

            The ARM926EJ has 16k data cache, 16k instruction cache, 16 word

            write buffer and an MMU."

    }

    cdl_option CYGPKG_HAL_ARM_ARM9_ARM940T {

        display       "ARM ARM940T microprocessor"

        implements    CYGINT_HAL_ARM_ARM9_VARIANT

        default_value 0

        no_define

        define        -file=system.h CYGPKG_HAL_ARM_ARM9_ARM940T

        description "

            The ARM920T has 4k data cache, 4k instruction cache, 8 word

            write buffer and a protection unit."

    }

    cdl_option CYGPKG_HAL_ARM_ARM9_ARM966E {

        display       "ARM ARM966E microprocessor"

        implements    CYGINT_HAL_ARM_ARM9_VARIANT

        default_value 0

        no_define

        define        -file=system.h CYGPKG_HAL_ARM_ARM9_ARM966E

        description "

            The ARM966E has no data cache, no instruction cache, a

            write buffer and no protection unit."

    }

}