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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [arm/] [at91/] [phycore/] [current/] [include/] [hal_platform_setup.h] - Blame information for rev 786

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1 786 skrzyp
#ifndef CYGONCE_HAL_PLATFORM_SETUP_H
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#define CYGONCE_HAL_PLATFORM_SETUP_H
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/*=============================================================================
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//
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//      hal_platform_setup.h
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//
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//      Platform specific support for HAL (assembly code)
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):   gthomas
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// Contributors:gthomas, tdrury, nickg, block
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// Date:        2001-07-12
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// Purpose:     AT91/phycore platform specific support routines
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// Description:
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// Usage:       #include <cyg/hal/hal_platform_setup.h>
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//
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//####DESCRIPTIONEND####
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//
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//===========================================================================*/
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#include <cyg/hal/var_io.h>
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//===========================================================================*/
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        .macro  _led_init
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        ldr     r0,=AT91_PIOA
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        mov     r1,#0x00000001
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        str     r1,[r0,#AT91_PIO_PER]
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        str     r1,[r0,#AT91_PIO_OER]
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        _led    0
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        .endm
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        .macro _led y
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        ldr     r0,=AT91_PIOA
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        mov     r1,#0x00000001
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        str     r1,[r0,#AT91_PIO_SODR]
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        mov     r1,#0x00000001
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        str     r1,[r0,#AT91_PIO_CODR]
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        .endm
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        .macro  _pclock_init
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        ldr     r0,=AT91_PMC            // Power saving interface
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        ldr     r1,=0xFFFFFFFF          // Enable all peripheral [clocks]
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        str     r1,[r0,#AT91_PMC_PCER]
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        .endm
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        .macro  _pio_init
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        ldr     r0,=AT91_PIOA           // Disable PIO (so peripherals can use bits)
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        ldr     r1,=(0x006d8000)          // Enable UARTS 0/1/2 to use pins
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        str     r1,[r0,#AT91_PIO_PDR]
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        .endm
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#define CYGHWR_LED_MACRO _led \x
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//===========================================================================*/
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#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
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#define AT91_PMC_CGMR_INIT0     (AT91_PMC_CGMR_MOSC_XTAL        |       \
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                                AT91_PMC_CGMR_MOSC_ENA          |       \
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                                AT91_PMC_CGMR_OSC_CNT(47))
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#define AT91_PMC_CGMR_INIT1     (AT91_PMC_CGMR_INIT0            |       \
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                                AT91_PMC_CGMR_CSS_MOSC)
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#define AT91_PMC_CGMR_INIT2     (AT91_PMC_CGMR_INIT1            |       \
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                                AT91_PMC_CGMR_PLL_MUL(1)        |       \
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                                AT91_PMC_CGMR_PLL_CNT(255))
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#define AT91_PMC_CGMR_INIT3     (AT91_PMC_CGMR_INIT0            |       \
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                                AT91_PMC_CGMR_PLL_MUL(1)        |       \
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                                AT91_PMC_CGMR_PLL_CNT(3)        |       \
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                                AT91_PMC_CGMR_CSS_PLL)
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        .macro  _setup
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        _led_init
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        // Change system frequency from 32kHz to 32MHz.
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        // First enable the master oscillator to run at 16MHz from
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        // external crystal.
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        ldr     r2,=AT91_PMC
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        ldr     r3,=AT91_PMC_CGMR_INIT0
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        str     r3,[r2,#AT91_PMC_CGMR]
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        // Wait for MOSC to stabilize.
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        mov     r4,#AT91_PMC_SR_MOSCS
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1:
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        ldr     r3,[r2,#AT91_PMC_SR]
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        and     r3,r4,r3
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        cmp     r3,r4 //#AT91_PMC_SR_MOSCS
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        bne     1b
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        // Now switch CPU clock to use master oscillator, after this we
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        // should be running at 16MHz.
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        ldr     r3,=AT91_PMC_CGMR_INIT1
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        str     r3,[r2,#AT91_PMC_CGMR]
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        // Now enable PLL to run at twice MOSC frequency
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        ldr     r3,=AT91_PMC_CGMR_INIT2
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        str     r3,[r2,#AT91_PMC_CGMR]
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        // Wait for PLL to stabilize
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        mov     r4,#AT91_PMC_SR_LOCK
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2:
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        ldr     r3,[r2,#AT91_PMC_SR]
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        and     r3,r4,r3
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        cmp     r3,r4
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        bne     2b
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        // Finally, switch CPU clock from MOSC to PLL 
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        ldr     r3,=AT91_PMC_CGMR_INIT3
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        str     r3,[r2,#AT91_PMC_CGMR]
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        // All done, we should be running at 32MHz now
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        ldr     r10,=_InitMemory        // Initialize memory controller
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        movs    r0,pc,lsr #20           // If ROM startup, PC < 0x100000
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        moveq   r10,r10,lsl #12         //   mask address to low 20 bits
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        moveq   r10,r10,lsr #12
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        ldmia   r10!,{r0-r9,r11-r12}    // Table of initialization constants
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#if defined(CYG_HAL_STARTUP_ROMRAM)
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        ldr     r10,=0x0000FFFF
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        and     r12,r12,r10
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        ldr     r10,=0x01000000
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        orr     r12,r12,r10
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#endif
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        stmia   r11!,{r0-r9}            // Write to controller
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        mov     pc,r12                  // Change address space, break pipeline
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_InitMemory:
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        .long   0x01002529  // 0x01000000, 16MB,  2 cycles  after transfer, 16-bit, 6 wait states
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        .long   0x020034A5  // 0x02000000, 16MB,  0 cycles after transfer, 16-bit, 1 wait state
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        .long   0x20000000  // unused
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        .long   0x30000000  // unused
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        .long   0x40000000  // unused
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        .long   0x50000000  // unused
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        .long   0x60000000  // unused
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        .long   0x70000000  // unused
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        .long   0x00000001  // REMAP command
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        .long   0x00000000  // Standard read protocol
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        .long   AT91_EBI    // External Bus Interface address
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        .long   10f         // address where to jump
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10:
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#if defined(CYG_HAL_STARTUP_ROMRAM)
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        ldr     r0,=0x01000000          // Relocate FLASH/ROM to on-chip RAM
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        ldr     r1,=0x02000000          // RAM base & length
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        ldr     r2,=0x04200000
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20:     ldr     r3,[r0],#4
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        str     r3,[r1],#4
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        cmp     r1,r2
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        bne     20b
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        ldr     r0,=30f
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        mov     pc,r0
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#endif
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        _pclock_init
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        _pio_init
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        .endm
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#define CYGSEM_HAL_ROM_RESET_USES_JUMP
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#else
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        .macro  _setup
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        _led_init
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        _pclock_init
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        _pio_init
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        .endm
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#endif
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#define PLATFORM_SETUP1     _setup
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//-----------------------------------------------------------------------------
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// end of hal_platform_setup.h
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#endif // CYGONCE_HAL_PLATFORM_SETUP_H

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