OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [arm/] [lpc24xx/] [ea2468/] [current/] [include/] [hal_platform_setup.h] - Blame information for rev 786

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 786 skrzyp
#ifndef CYGONCE_HAL_PLATFORM_SETUP_H
2
#define CYGONCE_HAL_PLATFORM_SETUP_H
3
/*=============================================================================
4
//
5
//      hal_platform_setup.h
6
//
7
//      Platform specific support for HAL (assembly code)
8
//
9
//=============================================================================
10
// ####ECOSGPLCOPYRIGHTBEGIN####
11
// -------------------------------------------
12
// This file is part of eCos, the Embedded Configurable Operating System.
13
// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2008 Free Software Foundation, Inc.
14
//
15
// eCos is free software; you can redistribute it and/or modify it under
16
// the terms of the GNU General Public License as published by the Free
17
// Software Foundation; either version 2 or (at your option) any later
18
// version.
19
//
20
// eCos is distributed in the hope that it will be useful, but WITHOUT
21
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
22
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
23
// for more details.
24
//
25
// You should have received a copy of the GNU General Public License
26
// along with eCos; if not, write to the Free Software Foundation, Inc.,
27
// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
28
//
29
// As a special exception, if other files instantiate templates or use
30
// macros or inline functions from this file, or you compile this file
31
// and link it with other works to produce a work based on this file,
32
// this file does not by itself cause the resulting work to be covered by
33
// the GNU General Public License. However the source code for this file
34
// must still be made available in accordance with section (3) of the GNU
35
// General Public License v2.
36
//
37
// This exception does not invalidate any other reasons why a work based
38
// on this file might be covered by the GNU General Public License.
39
// -------------------------------------------
40
// ####ECOSGPLCOPYRIGHTEND####
41
//=============================================================================
42
//#####DESCRIPTIONBEGIN####
43
//
44
// Author(s):    Uwe Kindler
45
// Contributors: Uwe Kindler
46
// Date:         2008-06-05
47
// Purpose:      EA LPC2468 OEM platform specific support routines
48
// Description:
49
// Usage:        #include <cyg/hal/hal_platform_setup.h>
50
//
51
//####DESCRIPTIONEND####
52
//
53
//===========================================================================*/
54
#include <pkgconf/system.h>
55
#include <cyg/hal/var_io.h>
56
 
57
 
58
//
59
// The minimum initialisation code - we simply setup a valid C stack in 
60
// internal SRAM and do any further initialisation in C code
61
//
62
#if defined(CYG_HAL_STARTUP_ROM)
63
.macro _setup
64
    //
65
    // While setting the stack pointer please note that the 
66
    // Flash programming routines use a
67
    // section of the on-chip SRAM. In-System Programming (ISP) uses 
68
    // the top 256 bytes and In-Application Programming (IAP) uses the 
69
    // top 128 bytes of the on-chip SRAM. The application stack should 
70
    // not overlap this area.
71
    //
72
    ldr r2,=0x4000ffff // ram end
73
    sub sp,r2,#0xff
74
 
75
    //
76
    // now map the vector table to internal flash - normally this should be
77
    // the default value after boot - but we go the save way here and force
78
    // the mapping to internal flash (the value for 
79
    // CYGARC_HAL_LPC24XX_REG_MEMMAP is 1)
80
    //
81
    ldr r0,=CYGARC_HAL_LPC24XX_REG_SCB_BASE
82
    mov r1,#1
83
    str r1, [r0,#CYGARC_HAL_LPC24XX_REG_MEMMAP] 
84
 
85
    //    
86
    // Now its is save to copy the first 64 bytes of flash to RAM
87
    //
88
    mov r0,#0                                   
89
    mov r1,#0x40000000
90
    mov r2,#0x40
91
1:
92
    ldr r3,[r0,#4]!
93
    str r3,[r1,#4]!
94
    cmps r0,r2
95
    bne 1b
96
 
97
    // 
98
    // Now we can map the vector table to internal SRAM because the SRAM no
99
    // contains a copy of the vector table from flash (the value for 
100
    // CYGARC_HAL_LPC24XX_REG_MEMMAP is 2 = SRAM)
101
    //
102
    ldr r0,=CYGARC_HAL_LPC24XX_REG_SCB_BASE
103
    mov r1,#2                                   // User RAM Mode. Interrupt 
104
                                     // vectors are re-mapped to Static RAM.
105
    str r1, [r0,#CYGARC_HAL_LPC24XX_REG_MEMMAP]
106
 
107
    //
108
    // now we have a valid stack and we can jump into the beautiful
109
    // world of C and do any further initialisation in C code
110
    //
111
    bl hal_plf_startup
112
.endm
113
#define CYGSEM_HAL_ROM_RESET_USES_JUMP
114
#else
115
.macro  _setup
116
.endm
117
#endif
118
 
119
#define PLATFORM_SETUP1 _setup
120
 
121
//-----------------------------------------------------------------------------
122
// end of hal_platform_setup.h
123
#endif // CYGONCE_HAL_PLATFORM_SETUP_H

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.