OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [arm/] [lpc2xxx/] [phycore229x/] [current/] [src/] [phycore229x_misc.c] - Blame information for rev 856

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 786 skrzyp
/*==========================================================================
2
//
3
//      phycore_misc.c
4
//
5
//      HAL misc board support code for Phytec phyCORE-LPC2292/94
6
//
7
//==========================================================================
8
// ####ECOSGPLCOPYRIGHTBEGIN####
9
// -------------------------------------------
10
// This file is part of eCos, the Embedded Configurable Operating System.
11
// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2008 Free Software Foundation, Inc.
12
//
13
// eCos is free software; you can redistribute it and/or modify it under
14
// the terms of the GNU General Public License as published by the Free
15
// Software Foundation; either version 2 or (at your option) any later
16
// version.
17
//
18
// eCos is distributed in the hope that it will be useful, but WITHOUT
19
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
20
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
21
// for more details.
22
//
23
// You should have received a copy of the GNU General Public License
24
// along with eCos; if not, write to the Free Software Foundation, Inc.,
25
// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
26
//
27
// As a special exception, if other files instantiate templates or use
28
// macros or inline functions from this file, or you compile this file
29
// and link it with other works to produce a work based on this file,
30
// this file does not by itself cause the resulting work to be covered by
31
// the GNU General Public License. However the source code for this file
32
// must still be made available in accordance with section (3) of the GNU
33
// General Public License v2.
34
//
35
// This exception does not invalidate any other reasons why a work based
36
// on this file might be covered by the GNU General Public License.
37
// -------------------------------------------
38
// ####ECOSGPLCOPYRIGHTEND####
39
//==========================================================================
40
//#####DESCRIPTIONBEGIN####
41
//
42
// Author(s):    Uwe Kindler
43
// Contributors: Uwe Kindler
44
// Date:         2007-11-20
45
// Purpose:      HAL board support
46
// Description:  Implementations of HAL board interfaces
47
//
48
//####DESCRIPTIONEND####
49
//
50
//========================================================================*/
51
#include <pkgconf/hal.h>
52
#include <pkgconf/hal_arm_lpc2xxx_phycore229x.h>
53
#include <cyg/hal/hal_io.h>             // IO macros
54
 
55
#include <cyg/infra/cyg_type.h>         // base types
56
#include <cyg/hal/var_io.h>
57
#include <cyg/hal/plf_io.h>
58
#include <pkgconf/hal.h>
59
 
60
#include <cyg/hal/hal_arch.h>
61
#include <cyg/hal/hal_intr.h>
62
 
63
#ifdef CYGPKG_REDBOOT
64
#include <redboot.h>
65
#endif
66
 
67
extern void cyg_hal_plf_serial_init(void);
68
 
69
void cyg_hal_plf_comms_init(void)
70
{
71
    static int initialized = 0;
72
 
73
    if (initialized)
74
        return;
75
    initialized = 1;
76
 
77
    cyg_hal_plf_serial_init();
78
}
79
 
80
//--------------------------------------------------------------------------
81
// hal_plf_hardware_init
82
//
83
void hal_plf_hardware_init(void)
84
{
85
#if defined(CYG_HAL_STARTUP_ROM) && defined(CYGPKG_DEVS_ETH_ARM_PHYCORE229X)
86
    cyg_uint32 regval;
87
 
88
    //
89
    // Configures the LAN IRQ
90
    // The interrupt is being used as active high edge triggered.
91
    // IMPORTANT: We execute this step only for ROM startup. If this is done
92
    // for RAM startup then wrong values are stored in EXTMODE and EXTPOLAR
93
    // register because of a bug in LPC229x hardware.
94
    //
95
    HAL_INTERRUPT_CONFIGURE(CYGHWR_HAL_ARM_PHYCORE229X_ETH_EINT + // the configured external interrupt
96
                            CYGNUM_HAL_INTERRUPT_EINT0,           // the first external interrupt
97
                            0,                                    // level = 0 - edge triggered
98
                            1);                                   // up = 1 - rising edge
99
 
100
    //
101
    // Set pin function of P0.16 to EINT0 or P0.14 to EINT1 for ethernet interrupt
102
    //
103
#if CYGHWR_HAL_ARM_PHYCORE229X_ETH_EINT == 0
104
    HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_PIN_BASE +
105
                    CYGARC_HAL_LPC2XXX_REG_PINSEL1, regval);
106
    regval |= 0x01;
107
    HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_PIN_BASE +
108
                     CYGARC_HAL_LPC2XXX_REG_PINSEL1, regval);
109
#elif CYGHWR_HAL_ARM_PHYCORE229X_ETH_EINT == 1
110
    HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_PIN_BASE +
111
                    CYGARC_HAL_LPC2XXX_REG_PINSEL0, regval);
112
    regval |= (0x10 << 28);
113
    HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_PIN_BASE +
114
                     CYGARC_HAL_LPC2XXX_REG_PINSEL0, regval);
115
#else
116
#error "Invalid CYGHWR_HAL_ARM_PHYCORE229X_ETH_EINT value"
117
#endif
118
#endif // #if defined(CYG_HAL_STARTUP_ROM) && defined(CYGPKG_DEVS_ETH_ARM_PHYCORE229X)
119
}
120
 
121
//--------------------------------------------------------------------------
122
// hal_lpc2xxx_set_leds
123
//
124
void hal_lpc2xxx_set_leds (int mask)
125
{
126
    //
127
    // implement function for setting diagnostic leds
128
    //
129
}
130
 
131
//--------------------------------------------------------------------------
132
// EOF phycore_misc.c
133
 
134
 
135
 
136
 
137
 
138
 
139
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.