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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [arm/] [pid/] [current/] [src/] [pid_misc.c] - Blame information for rev 786

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1 786 skrzyp
//==========================================================================
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//
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//      pid_misc.c
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//
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//      HAL misc board support code for ARM PID7
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//
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//==========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    gthomas
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// Contributors: gthomas
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// Date:         1999-02-20
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// Purpose:      HAL board support
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// Description:  Implementations of HAL board interfaces
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//
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//####DESCRIPTIONEND####
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//
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//===========================================================================*/
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#include <pkgconf/hal.h>
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#include <cyg/infra/cyg_type.h>         // base types
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#include <cyg/infra/cyg_trac.h>         // tracing macros
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#include <cyg/infra/cyg_ass.h>          // assertion macros
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#include <cyg/hal/hal_io.h>             // IO macros
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#include <cyg/hal/hal_arch.h>           // Register state info
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#include <cyg/hal/hal_diag.h>
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#include <cyg/hal/hal_intr.h>           // necessary?
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#include <cyg/hal/hal_if.h>             // calling interface
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/*------------------------------------------------------------------------*/
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// On-board timer
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/*------------------------------------------------------------------------*/
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// Timer registers
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#define CYG_DEVICE_TIMER1_BASE   0x0A800020
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#define CYG_DEVICE_TIMER1_LOAD \
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    ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER1_BASE + 0x00))
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    // Load value, read/write
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#define CYG_DEVICE_TIMER1_CURRENT \
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    ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER1_BASE + 0x04))
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    // Current value, read
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#define CYG_DEVICE_TIMER1_CONTROL \
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    ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER1_BASE + 0x08))
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    // Control register, read/write
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#define CYG_DEVICE_TIMER1_CLEAR \
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    ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER1_BASE + 0x0C))
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    // Clears interrrupt, write only
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#define CYG_DEVICE_TIMER_BASE   0x0A800020
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#define CYG_DEVICE_TIMER_LOAD \
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    ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x00))
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    // Load value, read/write
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#define CYG_DEVICE_TIMER_CURRENT \
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    ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x04))
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    // Current value, read
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#define CYG_DEVICE_TIMER_CONTROL \
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    ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x08))
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    // Control register, read/write
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#define CYG_DEVICE_TIMER_CLEAR \
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    ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x0C))
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    // Clears interrrupt, write only
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// Clock/timer control register
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#define CTL_ENABLE      0x80            // Bit   7: 1 - counter enabled
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#define CTL_DISABLE     0x00            //          0 - counter disabled
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#define CTL_FREERUN     0x00            // Bit   6: 0 - free running counter
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#define CTL_PERIODIC    0x40            //          1 - periodic timer mode
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#define CTL_SCALE_1     0x00            // Bits 32: 00 - Scale clock by 1
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#define CTL_SCALE_16    0x04            //          01 - Scale by 16
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#define CTL_SCALE_256   0x08            //          10 - Scale by 256
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                                        //               12.8us/tick
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// Interrupt controller registers
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#define CYG_DEVICE_ICTL_BASE    0x0A000000
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#define CYG_DEVICE_IRQ_Status \
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    ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x00))
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    // Current status, read only
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#define CYG_DEVICE_IRQ_Enable \
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    ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x08))
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    // Enable status, read only
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#define CYG_DEVICE_IRQ_EnableSet \
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    ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x08))
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    // Enable (1's only), write only
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#define CYG_DEVICE_IRQ_EnableClear \
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    ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x0C))
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    // Disable (1's only), write only
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static cyg_uint32 _period;
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void hal_clock_initialize(cyg_uint32 period)
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{
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    //diag_init();  diag_printf("%s(%d)\n", __PRETTY_FUNCTION__, period);
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    //diag_printf("psr = %x\n", psr());
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    HAL_WRITE_UINT32(CYG_DEVICE_TIMER_CONTROL, CTL_DISABLE);    // Turn off
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    HAL_WRITE_UINT32(CYG_DEVICE_TIMER_LOAD, period);
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    HAL_WRITE_UINT32(CYG_DEVICE_TIMER_CONTROL,
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                     CTL_ENABLE | CTL_PERIODIC | CTL_SCALE_16);
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    _period = period;
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}
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void hal_clock_reset(cyg_uint32 vector, cyg_uint32 period)
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{
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    //diag_init();  diag_printf("%s\n", __PRETTY_FUNCTION__);
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    HAL_WRITE_UINT32(CYG_DEVICE_TIMER_CLEAR, 0);
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    _period = period;
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}
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void hal_clock_read(cyg_uint32 *pvalue)
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{
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    cyg_uint32 value;
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//    diag_init();  diag_printf("%s\n", __PRETTY_FUNCTION__);
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    HAL_READ_UINT32(CYG_DEVICE_TIMER_CURRENT, value);
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    value &= 0xFFFF;
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    *pvalue = _period - (value & 0xFFFF);   // Note: counter is only 16 bits
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                                            //       and decreases
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}
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// -------------------------------------------------------------------------
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//
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// Delay for some number of micro-seconds
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//
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void hal_delay_us(cyg_int32 usecs)
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{
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    cyg_uint32 value;
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    cyg_uint64 ticks = ((usecs*CYGNUM_HAL_RTC_PERIOD*CYGNUM_HAL_RTC_DENOMINATOR)/1000000);
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    HAL_WRITE_UINT32(CYG_DEVICE_TIMER1_CONTROL, CTL_DISABLE);    // Turn off
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    HAL_WRITE_UINT32(CYG_DEVICE_TIMER1_LOAD, ticks);
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    HAL_WRITE_UINT32(CYG_DEVICE_TIMER1_CONTROL,
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                     CTL_ENABLE | CTL_FREERUN | CTL_SCALE_16);
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    // Wait for timer to underflow
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    do {
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        HAL_READ_UINT32(CYG_DEVICE_TIMER_CURRENT, value);
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        value &= 0xFFFF;
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    } while (value < 0x7fff);
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    HAL_WRITE_UINT32(CYG_DEVICE_TIMER1_CONTROL, CTL_DISABLE);    // Turn off
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}
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// -------------------------------------------------------------------------
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void hal_hardware_init(void)
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{
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    // Any hardware/platform initialization that needs to be done.
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    HAL_WRITE_UINT32(CYG_DEVICE_IRQ_EnableClear, 0xFFFF); // Clear all
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                                                         // interrupt sources
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    // Set up eCos/ROM interfaces
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    hal_if_init();
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}
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//
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// This routine is called to respond to a hardware interrupt (IRQ).  It
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// should interrogate the hardware and return the IRQ vector number.
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int hal_IRQ_handler(void)
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{
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    // Do hardware-level IRQ handling
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    int irq_status, vector;
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    HAL_READ_UINT32(CYG_DEVICE_IRQ_Status, irq_status);
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    //diag_init();  diag_printf("%s, status: %x\n", __PRETTY_FUNCTION__, irq_status); 
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    for (vector = 1;  vector < 16;  vector++) {
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        if (irq_status & (1<<vector)) return vector;
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    }
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    return CYGNUM_HAL_INTERRUPT_NONE; // This shouldn't happen!
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}
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//
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// Interrupt control
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//
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void hal_interrupt_mask(int vector)
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{
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    //diag_init();  diag_printf("%s(%d)\n", __PRETTY_FUNCTION__, vector);
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    HAL_WRITE_UINT32(CYG_DEVICE_IRQ_EnableClear, 1<<vector);
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}
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#if 0
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void hal_interrupt_status(void)
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{
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    int irq_status, irq_enable, timer_status, timer_value, timer_load;
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    HAL_READ_UINT32(CYG_DEVICE_IRQ_Status, irq_status);
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    HAL_READ_UINT32(CYG_DEVICE_IRQ_Enable, irq_enable);
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    HAL_READ_UINT32(CYG_DEVICE_TIMER_LOAD, timer_load);
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    HAL_READ_UINT32(CYG_DEVICE_TIMER_CURRENT, timer_value);
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    HAL_READ_UINT32(CYG_DEVICE_TIMER_CONTROL, timer_status);
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    diag_printf("Interrupt: IRQ: %x.%x, TIMER: %x.%x.%x, psr: %x\n",
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                irq_status, irq_enable, timer_status, timer_value,
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                timer_load, psr());
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}
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#endif
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void hal_interrupt_unmask(int vector)
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{
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    //diag_init();  diag_printf("%s(%d)\n", __PRETTY_FUNCTION__, vector);
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    HAL_WRITE_UINT32(CYG_DEVICE_IRQ_EnableSet, 1<<vector);
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}
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void hal_interrupt_acknowledge(int vector)
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{
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    //diag_init();  diag_printf("%s(%d)\n", __PRETTY_FUNCTION__, vector);
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}
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void hal_interrupt_configure(int vector, int level, int up)
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{
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    //diag_init();  diag_printf("%s(%d,%d,%d)\n", __PRETTY_FUNCTION__, vector, level, up);
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}
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void hal_interrupt_set_level(int vector, int level)
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{
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    //diag_init();  diag_printf("%s(%d,%d)\n", __PRETTY_FUNCTION__, vector, level);
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}
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void hal_show_IRQ(int vector, int data, int handler)
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{
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    //    diag_printf("IRQ - vector: %x, data: %x, handler: %x\n", vector, data, handler);
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}
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/*---------------------------------------------------------------------------*/
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/* End of hal_misc.c */

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