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786 |
skrzyp |
#ifndef CYGONCE_HAL_PLATFORM_SETUP_H
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#define CYGONCE_HAL_PLATFORM_SETUP_H
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/*=============================================================================
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//
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// hal_platform_setup.h
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//
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// Platform specific support for HAL (assembly code)
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): gthomas
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// Contributors: gthomas
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// Date: 2000-05-08
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// Purpose: Intel SA1110/Assabet platform specific support routines
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// Description:
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// Usage: #include <cyg/hal/hal_platform_setup.h>
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// Only used by "vectors.S"
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//
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//####DESCRIPTIONEND####
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//
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//===========================================================================*/
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#include <pkgconf/system.h> // System-wide configuration info
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#include CYGBLD_HAL_VARIANT_H // Variant (SA11x0) specific configuration
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#include CYGBLD_HAL_PLATFORM_H // Platform specific configuration
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#include <cyg/hal/hal_sa11x0.h> // Variant specific hardware definitions
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#include <cyg/hal/hal_mmu.h> // MMU definitions
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#include <cyg/hal/assabet.h> // Platform specific hardware definitions
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#if defined(CYG_HAL_STARTUP_ROM)
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#define PLATFORM_SETUP1 _platform_setup1
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#define CYGHWR_HAL_ARM_HAS_MMU
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#if (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 59000)
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#define SA11X0_PLL_CLOCK 0x0
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#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 73700)
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#define SA11X0_PLL_CLOCK 0x1
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#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 88500)
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#define SA11X0_PLL_CLOCK 0x2
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#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 103200)
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#define SA11X0_PLL_CLOCK 0x3
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#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 118000)
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#define SA11X0_PLL_CLOCK 0x4
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#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 132700)
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#define SA11X0_PLL_CLOCK 0x5
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#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 147500)
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#define SA11X0_PLL_CLOCK 0x6
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#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 162200)
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#define SA11X0_PLL_CLOCK 0x7
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#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 176900)
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#define SA11X0_PLL_CLOCK 0x8
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#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 191700)
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#define SA11X0_PLL_CLOCK 0x9
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#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 206400)
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#define SA11X0_PLL_CLOCK 0xA
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#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 221200)
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#define SA11X0_PLL_CLOCK 0xB
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#else
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#error Invalid processor clock speed
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#endif
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// This macro represents the initial startup code for the platform
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.macro _platform_setup1
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// Turn off LEDs
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ldr r1,=SA1110_BOARD_CONTROL
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ldr r2,=SA1110_BCR_MIN
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orr r2,r2,#SA1110_BCR_RED_LED
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orr r2,r2,#SA1110_BCR_GREEN_LED
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str r2,[r1]
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// Set up GPIO to read hardware configuration
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ldr r1,=SA11X0_GPIO_PIN_DIRECTION
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ldr r2,=0x0807A7FC
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str r2,[r1]
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ldr r3,=SA11X0_GPIO_PIN_OUTPUT_SET
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ldr r2,=0x2FC // Bits 2..9
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str r2,[r3] // Requests hardware configuration
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ldr r2,=0x0807A400 // Reconfigure 2..9 as inputs
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str r2,[r1]
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ldr r3,=SA11X0_GPIO_PIN_LEVEL
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mov r2,#100
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10: ldr r9,[r3] // Read multiple times to settle
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subs r2,r2,#1
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bne 10b
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ldr r2,=0x0807A7FC // Restore proper pin configuration
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str r2,[r1]
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ldr r3,=SA11X0_GPIO_PIN_OUTPUT_SET
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ldr r2,=0x10000 // Enable high power mode
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str r2,[r3]
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// Disable clock switching
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mcr p15,0,r0,\
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SA11X0_TEST_CLOCK_AND_IDLE_REGISTER,\
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SA11X0_DISABLE_CLOCK_SWITCHING_RM,\
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SA11X0_DISABLE_CLOCK_SWITCHING_OPCODE
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// Set up processor clock
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ldr r1,=SA11X0_PWR_MGR_PLL_CONFIG
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ldr r2,=SA11X0_PLL_CLOCK
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str r2,[r1]
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// Turn clock switching back on
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mcr p15,0,r0,\
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SA11X0_TEST_CLOCK_AND_IDLE_REGISTER,\
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SA11X0_ENABLE_CLOCK_SWITCHING_RM,\
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SA11X0_ENABLE_CLOCK_SWITCHING_OPCODE
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nop
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nop
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// Turn on Red LED
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ldr r1,=SA1110_BOARD_CONTROL
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ldr r2,=SA1110_BCR_MIN
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bic r2,r2,#SA1110_BCR_RED_LED
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orr r2,r2,#SA1110_BCR_GREEN_LED
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str r2,[r1]
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// Pause
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ldr r1,=100000
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10: sub r1,r1,#1
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cmp r1,#0
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bne 10b
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// Initialize DRAM controller
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ldr r1,=dram_table
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ldr r2,=__exception_handlers
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sub r1,r1,r2
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ldr r2,[r1],#4 // First control register
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10: ldr r3,[r1],#4
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str r3,[r2]
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ldr r2,[r1],#4 // Next control register
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cmp r2,#0
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bne 10b
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ldr r1,=SA1110_BOARD_CONTROL
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ldr r2,=SA1110_BCR_MIN
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orr r2,r2,#SA1110_BCR_RED_LED
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bic r2,r2,#SA1110_BCR_GREEN_LED
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str r2,[r1]
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// Enable UART
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ldr r1,=SA1110_GPCLK_CONTROL_0
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ldr r2,=SA1110_GPCLK_SUS_UART
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str r2,[r1]
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// Release DRAM hold (set by RESET)
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ldr r1,=SA11X0_PWR_MGR_SLEEP_STATUS
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ldr r2,=SA11X0_DRAM_CONTROL_HOLD
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str r2,[r1]
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// Perform 8 reads from unmapped/unenabled DRAM
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ldr r1,=SA11X0_RAM_BANK0_BASE
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ldr r2,[r1]
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ldr r2,[r1]
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ldr r2,[r1]
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ldr r2,[r1]
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ldr r2,[r1]
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ldr r2,[r1]
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ldr r2,[r1]
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ldr r2,[r1]
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// Enable DRAM controller
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ldr r1,=SA11X0_DRAM_CONFIGURATION
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ldr r2,=0x72547255
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str r2,[r1]
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b 19f
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// DRAM controller initialization
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dram_table:
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.word SA11X0_DRAM0_CAS_0, 0xAAAAAA7F
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.word SA11X0_DRAM0_CAS_1, 0xAAAAAAAA
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.word SA11X0_DRAM0_CAS_2, 0xAAAAAAAA
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#ifdef CYGSEM_HAL_ARM_SA11X0_ASSABET_NEPONSET_TIMINGS
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.word SA11X0_STATIC_CONTROL_0, 0x4B384370
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.word SA11X0_STATIC_CONTROL_1, 0x22212419
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#endif
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.word SA11X0_EXP_BUS_CONFIGURATION, 0x994A994A
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.word SA11X0_REFRESH_CONFIGURATION, 0x49FC0327
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.word SA11X0_DRAM2_CAS_0, 0xAAAAAA7F
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.word SA11X0_DRAM2_CAS_1, 0xAAAAAAAA
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.word SA11X0_DRAM2_CAS_2, 0xAAAAAAAA
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#ifdef CYGSEM_HAL_ARM_SA11X0_ASSABET_NEPONSET_TIMINGS
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.word SA11X0_STATIC_CONTROL_2, 0x42196669
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#endif
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.word SA11X0_SMROM_CONFIGURATION, 0xAFCCAFCC
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.word SA11X0_DRAM_CONFIGURATION, 0x72547254 // Disabled
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.word 0, 0
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19:
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// Wakeup from deep sleep mode
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ldr r1,=SA11X0_RESET_STATUS
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ldr r2,[r1]
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cmp r2,#SA11X0_SLEEP_MODE_RESET
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bne 45f
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ldr r1,=SA11X0_PWR_MGR_SCRATCHPAD
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ldr r1,[r1]
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mov pc,r1
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nop
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45: nop
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// Release peripheral hold (set by RESET)
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ldr r1,=SA11X0_PWR_MGR_SLEEP_STATUS
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ldr r2,=SA11X0_PERIPHERAL_CONTROL_HOLD
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str r2,[r1]
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// Set up a stack [for calling C code]
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ldr r1,=__startup_stack
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ldr r2,=SA11X0_RAM_BANK0_BASE
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orr sp,r1,r2
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// Create MMU tables
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bl hal_mmu_init
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// Turn on green LED
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ldr r1,=SA1110_BOARD_CONTROL
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ldr r2,=SA1110_BCR_MIN
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orr r2,r2,#SA1110_BCR_RED_LED
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bic r2,r2,#SA1110_BCR_GREEN_LED
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str r2,[r1]
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// Enable MMU
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ldr r2,=10f
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ldr r1,=MMU_Control_Init|MMU_Control_M
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mcr MMU_CP,0,r1,MMU_Control,c0
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mov pc,r2 /* Change address spaces */
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nop
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nop
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nop
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10:
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// Turn on both LEDs
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ldr r1,=SA1110_BOARD_CONTROL
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ldr r2,=SA1110_BCR_MIN
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bic r2,r2,#SA1110_BCR_RED_LED
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bic r2,r2,#SA1110_BCR_GREEN_LED
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str r2,[r1]
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// Save shadow copy of BCR, also hardware configuration
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ldr r1,=_assabet_BCR
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str r2,[r1]
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ldr r1,=_assabet_CFG
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str r9,[r1] // Saved far above...
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.endm
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#else // defined(CYG_HAL_STARTUP_ROM)
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#define PLATFORM_SETUP1
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#endif
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#define PLATFORM_VECTORS _platform_vectors
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.macro _platform_vectors
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.globl _assabet_BCR, _assabet_CFG
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_assabet_BCR: .long 0 // Board Control register shadow
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_assabet_CFG: .long 0 // Board Configuration (read at RESET)
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.endm
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/*---------------------------------------------------------------------------*/
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/* end of hal_platform_setup.h */
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#endif /* CYGONCE_HAL_PLATFORM_SETUP_H */
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