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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [arm/] [sa11x0/] [cerf/] [current/] [include/] [plf_mmap.h] - Blame information for rev 786

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#ifndef CYGONCE_HAL_SA11X0_PLATFORM_PLF_MMAP_H
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#define CYGONCE_HAL_SA11X0_PLATFORM_PLF_MMAP_H
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/*=============================================================================
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//
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//      plf_mmap.h
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//
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//      Platform specific memory map support
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    hmt
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// Contributors: hmt
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// Date:         2001-01-04
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// Purpose:      Intel SA11x0 series platform-specific memory mapping macros
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// Description:  Macros to convert a cached, virtual address to
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//               1) an uncached adddress for the same memory (if available)
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//               2) the equivalent physical address for giving to external
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//               hardware eg. DMA engines.
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//
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//               NB: this mapping is expressed here statically, independent
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//               of the actual mapping installed in the MMAP table.  So if
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//               someone changes that, or its initialisation is changed,
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//               then this module must change.  This is intended to be
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//               efficient at a cost of generality.  It is also intended to
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//               be called with constants (such as &my_struct) as input
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//               args, so that all the work can be done at compile time,
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//               with optimization on.
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//
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// Usage:        #include <cyg/hal/hal_cache.h>
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//               (which includes this file itself)
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//
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//####DESCRIPTIONEND####
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//
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//===========================================================================*/
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#include <cyg/hal/hal_misc.h>
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// Get the pagesize for a particular virtual address:
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// This does not depend on the vaddr.
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#define HAL_MM_PAGESIZE( vaddr, pagesize ) CYG_MACRO_START      \
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    (pagesize) = SZ_1M;                                         \
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CYG_MACRO_END
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// Get the physical address from a virtual address:
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// Only RAM and ROM are mapped; we just pass through all other values,
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// rather than detecting nonexistent areas here.
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#define HAL_VIRT_TO_PHYS_ADDRESS( vaddr, paddr ) CYG_MACRO_START           \
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    cyg_uint32 _v_ = (cyg_uint32)(vaddr);                                  \
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    if ( 32 * SZ_1M > _v_ )         /* 32Mb of SDRAM Bank 0 from 0-32Mb */ \
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        _v_ += 0xc00u * SZ_1M;                                             \
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    else if ( 0x500u * SZ_1M > _v_ ) /* Space between RAM and mapped ROM */\
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        /* no change */ ;                                                  \
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    else if ( 0x520u * SZ_1M > _v_ ) /* Mapped boot ROM size 32Mb */       \
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        _v_ -= 0x500u * SZ_1M;                                             \
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    else if ( 0xf00u * SZ_1M > _v_ ) /* Space between ROM and mapped I/O */\
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        /* no change */ ;                                                  \
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    else if ( 0xf10u * SZ_1M > _v_ ) /* Mapped I/O size 16Mb */            \
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        _v_ = (_v_ - 0xf00u * SZ_1M) + (0x080u * SZ_1M);                   \
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    else                            /* Rest of it */                       \
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        /* no change */ ;                                                  \
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    (paddr) = _v_;                                                         \
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CYG_MACRO_END
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// Get the virtual address for a physical address:
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// Only RAM and ROM are mapped; we just pass through all other values,
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// rather than detecting nonexistent areas here.
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#define HAL_PHYS_TO_VIRT_ADDRESS( paddr, vaddr ) CYG_MACRO_START           \
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    cyg_uint32 _p_ = (cyg_uint32)(paddr);                                  \
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    if ( 32 * SZ_1M > _p_ )         /* 32Mb Boot ROM mapped to 0x500Mb */  \
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        _p_ += 0x500u * SZ_1M;                                             \
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    else if ( 0x080u * SZ_1M > _p_ ) /* Space between ROM and I/O */       \
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        /* no change */ ;                                                  \
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    else if ( 0x090u * SZ_1M > _p_ ) /* I/O size 16Mb */                   \
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        _p_ = (_p_ - 0x080u * SZ_1M) + (0xf00u * SZ_1M);                   \
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    else if ( 0xc00u * SZ_1M > _p_ ) /* Space between I/O and SDRAM */     \
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        /* no change */ ;                                                  \
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    else if ( 0xc20u * SZ_1M > _p_ ) /* Raw RAM size 32Mb */               \
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        _p_ -= 0xc00u * SZ_1M;                                             \
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    else                            /* Rest of it */                       \
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        /* no change */ ;                                                  \
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    (vaddr) = _p_ ;                                                        \
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CYG_MACRO_END
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// Get a non-cacheable address for accessing the same store as a virtual
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// (assumed cachable) address:
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// Only RAM is mapped: ROM is only available cachable, everything else is
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// not cachable anyway.
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#define HAL_VIRT_TO_UNCACHED_ADDRESS( vaddr, uaddr ) CYG_MACRO_START       \
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    cyg_uint32 _v_ = (cyg_uint32)(vaddr);                                  \
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    if ( 32 * SZ_1M > _v_ )         /* 32Mb of SDRAM Bank 0 from 0-32Mb */ \
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        _v_ += 0xc00u * SZ_1M;                                              \
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    else            /* Everything else is already uncacheable or is ROM */ \
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        /* no change */ ;                                                  \
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    (uaddr) = _v_ ;                                                        \
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CYG_MACRO_END
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//---------------------------------------------------------------------------
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#endif // CYGONCE_HAL_SA11X0_PLATFORM_PLF_MMAP_H
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// EOF plf_mmap.h

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