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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [arm/] [snds/] [current/] [include/] [hal_platform_ints.h] - Blame information for rev 786

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1 786 skrzyp
#ifndef CYGONCE_HAL_PLATFORM_INTS_H
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#define CYGONCE_HAL_PLATFORM_INTS_H
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//==========================================================================
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//
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//      hal_platform_ints.h
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//
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//      
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//
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//==========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    gthomas
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// Contributors: gthomas, jskov
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//               Grant Edwards <grante@visi.com>
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// Date:         2001-07-31
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// Purpose:      
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// Description:  
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//
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//####DESCRIPTIONEND####
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//
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//========================================================================*/
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#define CYGNUM_HAL_INTERRUPT_EXT0     0
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#define CYGNUM_HAL_INTERRUPT_EXT1     1
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#define CYGNUM_HAL_INTERRUPT_EXT2     2
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#define CYGNUM_HAL_INTERRUPT_EXT3     3
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#define CYGNUM_HAL_INTERRUPT_UART0_TX 4
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#define CYGNUM_HAL_INTERRUPT_UART0_RX 5
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#if !defined(CYG_HAL_CPUTYPE)
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#error CYG_HAL_CPUTYPE not defined
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#endif
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#if defined(CYG_HAL_CPUTYPE_KS32C5000A)
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#define CYGNUM_HAL_INTERRUPT_UART0_ERR 6
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#define CYGNUM_HAL_INTERRUPT_UART1_TX  7
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#define CYGNUM_HAL_INTERRUPT_UART1_RX  8
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#define CYGNUM_HAL_INTERRUPT_UART1_ERR 9
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#define CYGNUM_HAL_INTERRUPT_DMA0     10
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#define CYGNUM_HAL_INTERRUPT_DMA1     11
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#define CYGNUM_HAL_INTERRUPT_TIMER0   12
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#define CYGNUM_HAL_INTERRUPT_TIMER1   13
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#define CYGNUM_HAL_INTERRUPT_HDLCA    14
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#define CYGNUM_HAL_INTERRUPT_HDLCB    15
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#else
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#define CYGNUM_HAL_INTERRUPT_UART1_TX 6
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#define CYGNUM_HAL_INTERRUPT_UART1_RX  7
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#define CYGNUM_HAL_INTERRUPT_DMA0     8
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#define CYGNUM_HAL_INTERRUPT_DMA1     9
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#define CYGNUM_HAL_INTERRUPT_TIMER0   10
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#define CYGNUM_HAL_INTERRUPT_TIMER1   11
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#define CYGNUM_HAL_INTERRUPT_HDLCA_TX  12
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#define CYGNUM_HAL_INTERRUPT_HDLCA_RX  13
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#define CYGNUM_HAL_INTERRUPT_HDLCB_TX  14
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#define CYGNUM_HAL_INTERRUPT_HDLCB_RX  15
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#endif
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#define CYGNUM_HAL_INTERRUPT_ETH_BDMA_TX  16
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#define CYGNUM_HAL_INTERRUPT_ETH_BDMA_RX  17
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#define CYGNUM_HAL_INTERRUPT_ETH_MAC_TX   18
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#define CYGNUM_HAL_INTERRUPT_ETH_MAC_RX   19
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#define CYGNUM_HAL_INTERRUPT_I2C      20
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#define CYGNUM_HAL_ISR_MIN                        0
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#define CYGNUM_HAL_ISR_MAX                        20
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#define CYGNUM_HAL_ISR_COUNT                      21
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// The vector used by the Real time clock
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#define CYGNUM_HAL_INTERRUPT_RTC                  CYGNUM_HAL_INTERRUPT_TIMER0
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//----------------------------------------------------------------------------
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// Reset.
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#define HAL_PLATFORM_RESET()
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#define HAL_PLATFORM_RESET_ENTRY 0x01010000
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#endif // CYGONCE_HAL_PLATFORM_INTS_H

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