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//==========================================================================
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//
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// iq80321_misc.c
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//
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// HAL misc board support code for Intel XScale IQ80321
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//
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//==========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): msalter
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// Contributors: msalter
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// Date: 2001-12-03
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// Purpose: HAL board support
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// Description: Implementations of HAL board interfaces
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//
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//####DESCRIPTIONEND####
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//
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//========================================================================*/
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#include <pkgconf/hal.h>
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#include <pkgconf/system.h>
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#include CYGBLD_HAL_PLATFORM_H
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#include <cyg/infra/cyg_type.h> // base types
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#include <cyg/infra/cyg_trac.h> // tracing macros
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#include <cyg/infra/cyg_ass.h> // assertion macros
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#include <cyg/hal/hal_io.h> // IO macros
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#include <cyg/hal/hal_arch.h> // Register state info
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#include <cyg/hal/hal_diag.h>
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#include <cyg/hal/hal_intr.h> // Interrupt names
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#include <cyg/hal/hal_cache.h>
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#include <cyg/hal/hal_verde.h> // Hardware definitions
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#include <cyg/hal/iq80321.h> // Platform specifics
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#include <cyg/infra/diag.h> // diag_printf
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#ifdef CYGPKG_IO_PCI
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cyg_uint32 cyg_pci_window_real_base = 0;
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#endif
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//
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// Platform specific initialization
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//
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void
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plf_hardware_init(void)
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{
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INTCTL_WRITE(0); // mask all irqs
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INTSTR_WRITE(0); // everything goes to IRQ
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*PIRSR = 0x0f;
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// RAM startup only - rewrite relevent bits depending on config
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#ifndef CYG_HAL_STARTUP_ROM
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HAL_DCACHE_SYNC(); // Force data out
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HAL_DCACHE_INVALIDATE_ALL(); // Flush TLBs: make new mmu state effective
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#endif // ! CYG_HAL_STARTUP_ROM - RAM start only
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}
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//
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// Memory layout - runtime variations of all kinds.
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//
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externC cyg_uint8 *
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hal_arm_mem_real_region_top( cyg_uint8 *regionend )
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{
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CYG_ASSERT( hal_dram_size > 0, "Didn't detect DRAM size!" );
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CYG_ASSERT( hal_dram_size <= 256<<20,
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"More than 256MB reported - that can't be right" );
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CYG_ASSERT( 0 == (hal_dram_size & 0xfffff),
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"hal_dram_size not whole Mb" );
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// is it the "normal" end of the DRAM region? If so, it should be
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// replaced by the real size
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if ( regionend ==
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((cyg_uint8 *)CYGMEM_REGION_ram + CYGMEM_REGION_ram_SIZE) ) {
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regionend = (cyg_uint8 *)CYGMEM_REGION_ram + hal_dram_size;
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}
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// Also, we must check for the top of the heap having moved. This is
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// because the heap does not abut the top of memory.
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#ifdef CYGMEM_SECTION_heap1
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if ( regionend ==
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((cyg_uint8 *)CYGMEM_SECTION_heap1 + CYGMEM_SECTION_heap1_SIZE) ) {
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// hal_dram_size excludes the PCI window on this platform.
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if ( regionend > (cyg_uint8 *)CYGMEM_REGION_ram + hal_dram_size )
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regionend = (cyg_uint8 *)CYGMEM_REGION_ram + hal_dram_size;
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}
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#endif
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return regionend;
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}
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// ------------------------------------------------------------------------
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// EOF iq80321_misc.c
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