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#ifndef CYGONCE_HAL_ARM_IXP425_VAR_IO_H
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#define CYGONCE_HAL_ARM_IXP425_VAR_IO_H
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/*=============================================================================
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//
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// var_io.h
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//
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// Platform specific support.
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): msalter
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// Contributors: msalter
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// Date: 2002-12-12
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// Purpose: IXP425 specific support routines
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// Description:
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// Usage: #include <cyg/hal/hal_io.h>
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//
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//####DESCRIPTIONEND####
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//
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//===========================================================================*/
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#include <cyg/hal/plf_io.h>
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//-----------------------------------------------------------------------------
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extern cyg_uint32 cyg_hal_plf_pci_cfg_read_dword (cyg_uint32 bus,
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cyg_uint32 devfn,
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cyg_uint32 offset);
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extern cyg_uint16 cyg_hal_plf_pci_cfg_read_word (cyg_uint32 bus,
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cyg_uint32 devfn,
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cyg_uint32 offset);
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extern cyg_uint8 cyg_hal_plf_pci_cfg_read_byte (cyg_uint32 bus,
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cyg_uint32 devfn,
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cyg_uint32 offset);
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extern void cyg_hal_plf_pci_cfg_write_dword (cyg_uint32 bus,
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cyg_uint32 devfn,
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cyg_uint32 offset,
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cyg_uint32 val);
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extern void cyg_hal_plf_pci_cfg_write_word (cyg_uint32 bus,
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cyg_uint32 devfn,
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cyg_uint32 offset,
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cyg_uint16 val);
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extern void cyg_hal_plf_pci_cfg_write_byte (cyg_uint32 bus,
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cyg_uint32 devfn,
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cyg_uint32 offset,
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cyg_uint8 val);
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extern void cyg_hal_plf_pci_io_outb(cyg_uint32 offset, cyg_uint8 value);
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extern void cyg_hal_plf_pci_io_outw(cyg_uint32 offset, cyg_uint16 value);
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extern void cyg_hal_plf_pci_io_outl(cyg_uint32 offset, cyg_uint32 value);
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extern cyg_uint8 cyg_hal_plf_pci_io_inb(cyg_uint32 offset);
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extern cyg_uint16 cyg_hal_plf_pci_io_inw(cyg_uint32 offset);
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extern cyg_uint32 cyg_hal_plf_pci_io_inl(cyg_uint32 offset);
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extern void cyg_hal_plf_pci_init(void);
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#define HAL_PCI_INIT() cyg_hal_plf_pci_init()
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// Translate the PCI interrupt requested by the device (INTA#, INTB#,
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// INTC# or INTD#) to the associated CPU interrupt (i.e., HAL vector).
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extern void cyg_hal_plf_pci_translate_interrupt(cyg_uint32 bus, cyg_uint32 devfn,
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CYG_ADDRWORD *vec, cyg_bool *valid);
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#define HAL_PCI_TRANSLATE_INTERRUPT( __bus, __devfn, __vec, __valid)\
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cyg_hal_plf_pci_translate_interrupt(__bus, __devfn, &(__vec), &(__valid))
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#ifdef CYGPKG_IO_PCI
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// Read a value from the PCI configuration space of the appropriate
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// size at an address composed from the bus, devfn and offset.
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#define HAL_PCI_CFG_READ_UINT8( __bus, __devfn, __offset, __val ) \
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__val = cyg_hal_plf_pci_cfg_read_byte((__bus), (__devfn), (__offset))
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#define HAL_PCI_CFG_READ_UINT16( __bus, __devfn, __offset, __val ) \
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__val = cyg_hal_plf_pci_cfg_read_word((__bus), (__devfn), (__offset))
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#define HAL_PCI_CFG_READ_UINT32( __bus, __devfn, __offset, __val ) \
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__val = cyg_hal_plf_pci_cfg_read_dword((__bus), (__devfn), (__offset))
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// Write a value to the PCI configuration space of the appropriate
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// size at an address composed from the bus, devfn and offset.
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#define HAL_PCI_CFG_WRITE_UINT8( __bus, __devfn, __offset, __val ) \
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cyg_hal_plf_pci_cfg_write_byte((__bus), (__devfn), (__offset), (__val))
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#define HAL_PCI_CFG_WRITE_UINT16( __bus, __devfn, __offset, __val ) \
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cyg_hal_plf_pci_cfg_write_word((__bus), (__devfn), (__offset), (__val))
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#define HAL_PCI_CFG_WRITE_UINT32( __bus, __devfn, __offset, __val ) \
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cyg_hal_plf_pci_cfg_write_dword((__bus), (__devfn), (__offset), (__val))
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#else
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#define HAL_PCI_CFG_READ_UINT8( __bus, __devfn, __offset, __val )
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#define HAL_PCI_CFG_READ_UINT16( __bus, __devfn, __offset, __val )
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#define HAL_PCI_CFG_READ_UINT32( __bus, __devfn, __offset, __val )
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#define HAL_PCI_CFG_WRITE_UINT8( __bus, __devfn, __offset, __val )
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#define HAL_PCI_CFG_WRITE_UINT16( __bus, __devfn, __offset, __val )
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#define HAL_PCI_CFG_WRITE_UINT32( __bus, __devfn, __offset, __val )
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#endif
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// Default memory mapping details
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#ifndef CYGARC_PHYSICAL_ADDRESS
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#define CYGARC_PHYSICAL_ADDRESS(x) (x)
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#endif
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#ifndef CYGARC_UNCACHED_ADDRESS
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#define CYGARC_UNCACHED_ADDRESS(x) \
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((((cyg_uint32)(x)) < 0x10000000) ? (((cyg_uint32)(x))+0x20000000) : (x))
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#endif
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#ifndef CYGARC_VIRT_TO_BUS
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// direct mapped at uncached address
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#define CYGARC_VIRT_TO_BUS(x) (((cyg_uint32)(x) & 0xfffffff))
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#endif
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#ifndef CYGARC_BUS_TO_VIRT
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// direct mapped
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#define CYGARC_BUS_TO_VIRT(x) (x)
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#endif
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#define HAL_PCI_ALLOC_BASE_MEMORY 0x48000000
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#define HAL_PCI_ALLOC_BASE_IO 0
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#define HAL_PCI_PHYSICAL_MEMORY_BASE 0
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#define HAL_PCI_PHYSICAL_IO_BASE 0
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//-----------------------------------------------------------------------------
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// HAL IO macros.
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// Macro used to determine if given address corresponds to PCI IO address
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// space. Evaluates to non-zero if address is for PCI IO.
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#ifdef CYGPKG_IO_PCI
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#define IXDP425_IS_PCI_IO(x) (((cyg_uint32)(x))<0x40000000)
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#else
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#define IXDP425_IS_PCI_IO(x) 0
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#endif
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//-----------------------------------------------------------------------------
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// BYTE Register access.
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#define HAL_READ_UINT8( _reg_, _value_ ) \
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CYG_MACRO_START \
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if (IXDP425_IS_PCI_IO(_reg_)) \
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(_value_) = cyg_hal_plf_pci_io_inb((cyg_uint32)(_reg_)); \
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else \
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((_value_) = *((volatile CYG_BYTE *)(_reg_))); \
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CYG_MACRO_END
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#define HAL_WRITE_UINT8( _reg_, _value_ ) \
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CYG_MACRO_START \
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if (IXDP425_IS_PCI_IO(_reg_)) \
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cyg_hal_plf_pci_io_outb((cyg_uint32)(_reg_), _value_); \
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else \
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(*((volatile CYG_BYTE *)(_reg_)) = (_value_)); \
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CYG_MACRO_END
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//-----------------------------------------------------------------------------
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// 16 bit access.
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#define HAL_READ_UINT16( _reg_, _value_ ) \
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CYG_MACRO_START \
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if (IXDP425_IS_PCI_IO(_reg_)) \
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(_value_) = cyg_hal_plf_pci_io_inw((cyg_uint32)(_reg_)); \
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else \
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((_value_) = *((volatile CYG_WORD16 *)(_reg_))); \
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CYG_MACRO_END
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#define HAL_WRITE_UINT16( _reg_, _value_ ) \
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CYG_MACRO_START \
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if (IXDP425_IS_PCI_IO(_reg_)) \
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cyg_hal_plf_pci_io_outw((cyg_uint32)(_reg_), _value_); \
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else \
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(*((volatile CYG_WORD16 *)(_reg_)) = (_value_)); \
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CYG_MACRO_END
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//-----------------------------------------------------------------------------
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// 32 bit access.
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#define HAL_READ_UINT32( _reg_, _value_ ) \
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CYG_MACRO_START \
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if (IXDP425_IS_PCI_IO(_reg_)) \
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(_value_) = cyg_hal_plf_pci_io_inl((cyg_uint32)(_reg_)); \
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else \
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((_value_) = *((volatile CYG_WORD32 *)(_reg_))); \
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CYG_MACRO_END
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#define HAL_WRITE_UINT32( _reg_, _value_ ) \
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CYG_MACRO_START \
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if (IXDP425_IS_PCI_IO(_reg_)) \
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cyg_hal_plf_pci_io_outl((cyg_uint32)(_reg_), _value_); \
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else \
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(*((volatile CYG_WORD32 *)(_reg_)) = (_value_)); \
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CYG_MACRO_END
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#define HAL_IO_MACROS_DEFINED
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//-----------------------------------------------------------------------------
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// HAL flash functions.
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// These perform special operations between RedBoot and the flash driver.
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externC int hal_flash_read(void *addr, void *data, int len, void **err);
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externC int hal_flash_program(void *addr, void *data, int len, void **err);
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#endif // CYGONCE_HAL_ARM_IXP425_VAR_IO_H
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// EOF var_io.h
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