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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [arm/] [xscale/] [uE250/] [current/] [include/] [hal_platform_setup.h] - Blame information for rev 786

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1 786 skrzyp
#ifndef CYGONCE_HAL_PLATFORM_SETUP_H
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#define CYGONCE_HAL_PLATFORM_SETUP_H
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/*=============================================================================
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//
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//      hal_platform_setup.h
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//
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//      Platform specific support for HAL (assembly code)
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//===========================================================================*/
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#include <pkgconf/system.h>             // System-wide configuration info
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#include CYGBLD_HAL_VARIANT_H           // Variant specific configuration
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#include CYGBLD_HAL_PLATFORM_H          // Platform specific configuration
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#include <cyg/hal/hal_pxa2x0.h>         // Variant specific hardware definitions
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#include <cyg/hal/hal_mmu.h>            // MMU definitions
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#include <cyg/hal/hal_mm.h>             // more MMU definitions
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#include <cyg/hal/uE250.h>              // Platform specific hardware definitions
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#include <cyg/hal/hal_spd.h>
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#define MDCNFG_VALUE   0x03001BC9
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// #define MDCNFG_VALUE 0x00001BC9
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#define MDMRS_VALUE    0x00000000
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#define MDREFR_VALUE_1 0x00494030
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#define MDREFR_VALUE_2 0x00094030
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#define MDREFR_VALUE_3 0x0009C030
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#define GPCR0_VALUE 0xFFFFFFFF
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#define GPCR1_VALUE 0xFFFFFFFF
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#define GPCR2_VALUE 0xFFFFFFFF
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#define GPSR0_VALUE 0x00028000
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#define GPSR1_VALUE 0x00002122
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#define GPSR2_VALUE 0x0001C000
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#define GPDR0_VALUE 0x03E3A080
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#define GPDR1_VALUE 0x00FFA963
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#define GPDR2_VALUE 0x0001C000
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#define GAFR0_L_VALUE 0x88000000
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#define GAFR0_U_VALUE 0x001A8010
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#define GAFR1_L_VALUE 0x90900008 
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#define GAFR1_U_VALUE 0x0005AAAA
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#define GAFR2_L_VALUE 0xA0000000
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#define GAFR2_U_VALUE 0x00000002
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#define PSSR_VALUE          0x20
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#define MSC0_VALUE_NONBURST 0x2FD0
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#define MSC0_VALUE_BURST    0x22D2
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#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
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#define PLATFORM_SETUP1  _platform_setup1
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// #define PLATFORM_EXTRAS  <cyg/hal/hal_platform_extras.h>
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#define CYGHWR_HAL_ARM_HAS_MMU
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// This macro represents the initial startup code for the platform        
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  .macro _platform_setup1
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  // This is where we wind up immediately after reset. At this point, we
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  // are executing from the boot address (0x00000000), not the eventual
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  // flash address. Do some basic setup using position independent code
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  // then switch to real flash address
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// FIXME FIXME FIXME FIXME FIXME FIXME FIXME FIXME FIXME 
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// This is a quick and dirty workaround to an apparent gas/ld
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// bug. The computed UNMAPPED_PTR(reset_vector) is off by 0x20.
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  .rept 0x20/4
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  nop
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  .endr
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// FIXME FIXME FIXME FIXME FIXME FIXME FIXME FIXME FIXME 
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   // Set the direction of the LED GPIO's to 'output'
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   // This will disable the LED's (which are on at boot-time, so we
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   // can see we have safely landed here.
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  ldr r1, =PXA2X0_GPDR0
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  ldr r2, =0x00600000
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  str r2, [r1]
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  // Disable interrupts, by setting the Interrupt Mask Registers to all 0's
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  ldr     r1,=PXA2X0_ICMR
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  mov     r0,#0
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  str     r0,[r1]
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  // disable MMU
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  mov     r0, #0x0
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  mcr     p15, 0, r0, c1, c0, 0
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  // flush TLB
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  mov     r0, #0x0
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  mcr     p15, 0, r0, c8, c7, 0   //  Flush TLB
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  // flush I&D caches and BTB
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  mov     r0, #0x0
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  mcr     p15, 0, r0, c7, c7, 0   //  Flush caches
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  CPWAIT r0
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  // Enables access to coprocessor 0 (The only extra coprocessor on the PXA250)
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  ldr     r0, =0x00000001
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  mcr     p15, 0, r0, c15, c1, 0
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  // Disable the IRQ's and FIQ's in the program status register and 
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  // enable supervisor mode 
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  ldr     r0,=(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_SUPERVISOR_MODE)
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  msr     cpsr, r0
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  // Set TURBO mode
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  ldr     r2, =0x00000321
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  ldr     r1, =PXA2X0_CCCR
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  str     r2,[r1]
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  ldr     r1, =0x00000003
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  mcr     p14, 0, r1, c6, c0, 0
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  // Set-up memory according to NMI specs
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  ldr     r1,=PXA2X0_RAM_BANK0_BASE
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  ldr     r2,[r1]
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  ldr     r2,[r1]
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  ldr     r2,[r1]
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  ldr     r2,[r1]
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  ldr     r2,[r1]
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  ldr     r2,[r1]
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  ldr     r2,[r1]
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  ldr     r2,[r1]
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  // Set DRAM Configuration Value
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  ldr     r1,=PXA2X0_MDCNFG
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  ldr     r2,=MDCNFG_VALUE
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  str     r2,[r1]
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  // Set MDMRS
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  ldr     r1,=PXA2X0_MDMRS
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  ldr     r2,=MDMRS_VALUE
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  str     r2,[r1]
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  // Set Refresh Values
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  ldr     r1,=PXA2X0_MDREFR
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  ldr     r2,=MDREFR_VALUE_1
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  str     r2,[r1]
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  ldr     r1,=PXA2X0_MDREFR
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  ldr     r2,=MDREFR_VALUE_2
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  str     r2,[r1]
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  ldr     r1,=PXA2X0_MDREFR
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  ldr     r2,=MDREFR_VALUE_3
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  str     r2,[r1]
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  // Set Static memory registers
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  ldr     r1,=PXA2X0_MSC0
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  ldr     r2,=MSC0_VALUE_NONBURST
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  str     r2,[r1]
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  // Setup GPIO clear registers
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  ldr r1, =PXA2X0_GPCR0
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  ldr r2, =(GPCR0_VALUE)
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  str r2, [r1]
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  ldr r1, =PXA2X0_GPCR1
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  ldr r2, =(GPCR1_VALUE)
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  str r2, [r1]
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  ldr r1, =PXA2X0_GPCR2
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  ldr r2, =(GPCR2_VALUE)
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  str r2, [r1]
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  // Setup GPIO set registers
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  ldr r1, =PXA2X0_GPSR0
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  ldr r2, =(GPSR0_VALUE)
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  str r2, [r1]
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  ldr r1, =PXA2X0_GPSR1
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  ldr r2, =(GPSR1_VALUE)
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  str r2, [r1]
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  ldr r1, =PXA2X0_GPSR2
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  ldr r2, =(GPSR2_VALUE)
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  str r2, [r1]
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  // Setup GPIO direction registers
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  ldr r1, =PXA2X0_GPDR0
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  ldr r2, =(GPDR0_VALUE)
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  str r2, [r1]
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  ldr r1, =PXA2X0_GPDR1
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  ldr r2, =(GPDR1_VALUE)
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  str r2, [r1]
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  ldr r1, =PXA2X0_GPDR2
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  ldr r2, =(GPDR2_VALUE)
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  str r2, [r1]
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  // Setup GPIO alternate function registers
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  ldr r1, =PXA2X0_GAFR0_L
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  ldr r2, =(GAFR0_L_VALUE)
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  str r2, [r1]
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  ldr r1, =PXA2X0_GAFR0_U
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  ldr r2, =(GAFR0_U_VALUE)
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  str r2, [r1]
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  ldr r1, =PXA2X0_GAFR1_L
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  ldr r2, =(GAFR1_L_VALUE)
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  str r2, [r1]
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  ldr r1, =PXA2X0_GAFR1_U
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  ldr r2, =(GAFR1_U_VALUE)
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  str r2, [r1]
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  ldr r1, =PXA2X0_GAFR2_L
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  ldr r2, =(GAFR2_L_VALUE)
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  str r2, [r1]
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  ldr r1, =PXA2X0_GAFR2_U
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  ldr r2, =(GAFR2_U_VALUE)
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  str r2, [r1]
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  ldr r1, =PXA2X0_PSSR
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  ldr r2, =(PSSR_VALUE)
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  str r2, [r1]
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  // Enable the Icache
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  mrc     p15, 0, r0, c1, c0, 0
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  orr     r0, r0, #MMU_Control_I
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  mcr     p15, 0, r0, c1, c0, 0
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  CPWAIT  r0
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  // Turn on red led
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  ldr     r1,=PXA2X0_GPSR0
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  ldr     r2,=0x00200000
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  str     r2,[r1]
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  // Set up a stack [for calling C code]
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  ldr     r1,=__startup_stack
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  ldr     r2,=PXA2X0_RAM_BANK0_BASE
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  orr     sp,r1,r2
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  // Create MMU tables
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  bl      hal_mmu_init
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  // Turn off red led
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  ldr     r1,=PXA2X0_GPCR0
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  ldr     r2,=0x00200000
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  str     r2,[r1]
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  // Enable MMU
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  ldr     r2,=10f
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  ldr     r1,=MMU_Control_Init|MMU_Control_M
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  mcr     MMU_CP,0,r1,MMU_Control,c0
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  mov     pc, r2
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  nop
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  nop
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  nop
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10:
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  // Turn on green led
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  ldr     r1,=PXA2X0_GPSR0
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  ldr     r2,=0x00400000
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  str     r2,[r1]
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  .endm
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#else // defined(CYG_HAL_STARTUP_ROM)
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#define PLATFORM_SETUP1
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#endif
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#define PLATFORM_VECTORS         _platform_vectors
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        .macro  _platform_vectors
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        .globl  hal_pcsr_cfg_retry
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hal_pcsr_cfg_retry:   .long   0  // Boot-time value of PCSR Retry bit.
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        .endm
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/*---------------------------------------------------------------------------*/
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/* end of hal_platform_setup.h                                               */
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#endif /* CYGONCE_HAL_PLATFORM_SETUP_H */

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