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#ifndef CYGONCE_HAL_PLF_INTS_H
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#define CYGONCE_HAL_PLF_INTS_H
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//==========================================================================
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//
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// hal_plf_ints.h
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//
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// HAL Platform Interrupt support
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//
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//==========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): msalter
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// Contributors: msalter
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// Date: 2001-12-03
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// Purpose: Define Interrupt support
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// Description: The interrupt details for a specific platform is defined here.
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// Usage:
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//
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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// start with variant ints
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#include <pkgconf/hal.h>
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#include CYGBLD_HAL_VAR_INTS_H
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#include <cyg/hal/plf_io.h>
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//----------------------------------------------------------------------------
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// Additional interrupts from PCI & Motherboard
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#define _uPCI_BASE_INTERRUPT (96+17)
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#define CYGNUM_HAL_INTERRUPT_PCI_INTA (_uPCI_BASE_INTERRUPT+0)
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#define CYGNUM_HAL_INTERRUPT_PCI_INTB (_uPCI_BASE_INTERRUPT+1)
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#define CYGNUM_HAL_INTERRUPT_PCI_INTC (_uPCI_BASE_INTERRUPT+2)
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#define CYGNUM_HAL_INTERRUPT_PCI_INTD (_uPCI_BASE_INTERRUPT+3)
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#define CYGNUM_HAL_INTERRUPT_PXA (_uPCI_BASE_INTERRUPT+4)
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#undef CYGNUM_HAL_ISR_MIN
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#undef CYGNUM_HAL_ISR_MAX
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#define CYGNUM_HAL_ISR_MIN 0
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#define CYGNUM_HAL_ISR_MAX (_uPCI_BASE_INTERRUPT+4)
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//----------------------------------------------------------------------------
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// Platform specific interrupt handling
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externC int _uE250_extended_irq(void);
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externC void _uE250_extended_int_mask(int vector);
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externC void _uE250_extended_int_unmask(int vector);
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externC void _uE250_extended_int_acknowledge(int vector);
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externC void _uE250_extended_int_configure(int vector, int level, int up);
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externC void _uE250_extended_int_set_level(int vector, int level);
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#define HAL_EXTENDED_IRQ_HANDLER(sources) \
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if ((sources & (1 << CYGNUM_HAL_INTERRUPT_GPIO1)) != 0) { \
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int res = _uE250_extended_irq(); \
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if (res) return res; \
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};
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#define HAL_EXTENDED_INTERRUPT_MASK(vector) \
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if (vector >= _uPCI_BASE_INTERRUPT) { \
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_uE250_extended_int_mask(vector); \
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return; \
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}
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#define HAL_EXTENDED_INTERRUPT_UNMASK(vector) \
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if (vector >= _uPCI_BASE_INTERRUPT) { \
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_uE250_extended_int_unmask(vector); \
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return; \
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}
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#define HAL_EXTENDED_INTERRUPT_ACKNOWLEDGE(vector) \
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if (vector >= _uPCI_BASE_INTERRUPT) { \
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_uE250_extended_int_acknowledge(vector); \
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return; \
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}
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#define HAL_EXTENDED_INTERRUPT_CONFIGURE(vector, level, up) \
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if (vector >= _uPCI_BASE_INTERRUPT) { \
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_uE250_extended_int_configure(vector, level, up); \
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return; \
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}
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#define HAL_EXTENDED_INTERRUPT_SET_LEVEL(vector, level) \
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if (vector >= _uPCI_BASE_INTERRUPT) { \
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_uE250_extended_int_set_level(vector, level); \
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return; \
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}
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//----------------------------------------------------------------------------
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// Reset.
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#undef HAL_PLATFORM_RESET
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#define HAL_PLATFORM_RESET() \
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CYG_MACRO_START \
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cyg_uint32 ctrl; \
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\
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/* By disabling interupts we will just hang in the loop below */ \
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/* if for some reason the software reset fails. */ \
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HAL_DISABLE_INTERRUPTS(ctrl); \
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\
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PCICTL_MISC = PCI_SYSTEM_RESET; \
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\
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for(;;); /* hang here forever if reset fails */ \
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CYG_MACRO_END
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// Fallback (never really used)
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#define HAL_PLATFORM_RESET_ENTRY 0x00000000
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#endif // CYGONCE_HAL_PLF_INTS_H
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