| 1 |
786 |
skrzyp |
#ifndef CYGONCE_HAL_HAL_INTR_H
|
| 2 |
|
|
#define CYGONCE_HAL_HAL_INTR_H
|
| 3 |
|
|
|
| 4 |
|
|
//==========================================================================
|
| 5 |
|
|
//
|
| 6 |
|
|
// hal_intr.h
|
| 7 |
|
|
//
|
| 8 |
|
|
// ColdFire interrupt/exception support
|
| 9 |
|
|
//
|
| 10 |
|
|
//==========================================================================
|
| 11 |
|
|
// ####ECOSGPLCOPYRIGHTBEGIN####
|
| 12 |
|
|
// -------------------------------------------
|
| 13 |
|
|
// This file is part of eCos, the Embedded Configurable Operating System.
|
| 14 |
|
|
// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2006 Free Software Foundation, Inc.
|
| 15 |
|
|
//
|
| 16 |
|
|
// eCos is free software; you can redistribute it and/or modify it under
|
| 17 |
|
|
// the terms of the GNU General Public License as published by the Free
|
| 18 |
|
|
// Software Foundation; either version 2 or (at your option) any later
|
| 19 |
|
|
// version.
|
| 20 |
|
|
//
|
| 21 |
|
|
// eCos is distributed in the hope that it will be useful, but WITHOUT
|
| 22 |
|
|
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
| 23 |
|
|
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
| 24 |
|
|
// for more details.
|
| 25 |
|
|
//
|
| 26 |
|
|
// You should have received a copy of the GNU General Public License
|
| 27 |
|
|
// along with eCos; if not, write to the Free Software Foundation, Inc.,
|
| 28 |
|
|
// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
|
| 29 |
|
|
//
|
| 30 |
|
|
// As a special exception, if other files instantiate templates or use
|
| 31 |
|
|
// macros or inline functions from this file, or you compile this file
|
| 32 |
|
|
// and link it with other works to produce a work based on this file,
|
| 33 |
|
|
// this file does not by itself cause the resulting work to be covered by
|
| 34 |
|
|
// the GNU General Public License. However the source code for this file
|
| 35 |
|
|
// must still be made available in accordance with section (3) of the GNU
|
| 36 |
|
|
// General Public License v2.
|
| 37 |
|
|
//
|
| 38 |
|
|
// This exception does not invalidate any other reasons why a work based
|
| 39 |
|
|
// on this file might be covered by the GNU General Public License.
|
| 40 |
|
|
// -------------------------------------------
|
| 41 |
|
|
// ####ECOSGPLCOPYRIGHTEND####
|
| 42 |
|
|
//==========================================================================
|
| 43 |
|
|
//#####DESCRIPTIONBEGIN####
|
| 44 |
|
|
//
|
| 45 |
|
|
// Author(s): Enrico Piria
|
| 46 |
|
|
// Contributors:
|
| 47 |
|
|
// Date: 2005-25-06
|
| 48 |
|
|
// Purpose: Provide ColdFire-specific interrupt and exception
|
| 49 |
|
|
// definitions.
|
| 50 |
|
|
// Usage: #include <cyg/hal/hal_intr.h>
|
| 51 |
|
|
//
|
| 52 |
|
|
//####DESCRIPTIONEND####
|
| 53 |
|
|
//========================================================================
|
| 54 |
|
|
|
| 55 |
|
|
#include <pkgconf/hal.h>
|
| 56 |
|
|
#include <cyg/infra/cyg_type.h>
|
| 57 |
|
|
#include <cyg/hal/hal_arch.h>
|
| 58 |
|
|
|
| 59 |
|
|
#include <cyg/hal/var_intr.h>
|
| 60 |
|
|
|
| 61 |
|
|
#include <cyg/infra/cyg_ass.h> // CYG_FAIL
|
| 62 |
|
|
|
| 63 |
|
|
// -------------------------------------------------------------------------
|
| 64 |
|
|
// ColdFire exception vectors. These correspond to VSRs and are the values
|
| 65 |
|
|
// to use for HAL_VSR_GET/SET.
|
| 66 |
|
|
|
| 67 |
|
|
#define CYGNUM_HAL_VECTOR_RESETSP 0
|
| 68 |
|
|
#define CYGNUM_HAL_VECTOR_RESETPC 1
|
| 69 |
|
|
#define CYGNUM_HAL_VECTOR_BUSERR 2
|
| 70 |
|
|
#define CYGNUM_HAL_VECTOR_ADDRERR 3
|
| 71 |
|
|
#define CYGNUM_HAL_VECTOR_ILLINST 4
|
| 72 |
|
|
#define CYGNUM_HAL_VECTOR_ZERODIV 5
|
| 73 |
|
|
|
| 74 |
|
|
// Exception vectors 6-7 are reserved
|
| 75 |
|
|
|
| 76 |
|
|
#define CYGNUM_HAL_VECTOR_PRIVVIOLATION 8
|
| 77 |
|
|
#define CYGNUM_HAL_VECTOR_TRACE 9
|
| 78 |
|
|
#define CYGNUM_HAL_VECTOR_L1010 10
|
| 79 |
|
|
#define CYGNUM_HAL_VECTOR_L1111 11
|
| 80 |
|
|
#define CYGNUM_HAL_VECTOR_DEBUG12 12
|
| 81 |
|
|
#define CYGNUM_HAL_VECTOR_DEBUG13 13
|
| 82 |
|
|
#define CYGNUM_HAL_VECTOR_FORMAT 14
|
| 83 |
|
|
#define CYGNUM_HAL_VECTOR_UNINITINT 15
|
| 84 |
|
|
|
| 85 |
|
|
// Exception vectors 16-23 are reserved
|
| 86 |
|
|
|
| 87 |
|
|
#define CYGNUM_HAL_VECTOR_SPURINT 24
|
| 88 |
|
|
|
| 89 |
|
|
#define CYGNUM_HAL_VECTOR_AUTOVEC1 25
|
| 90 |
|
|
#define CYGNUM_HAL_VECTOR_AUTOVEC2 26
|
| 91 |
|
|
#define CYGNUM_HAL_VECTOR_AUTOVEC3 27
|
| 92 |
|
|
#define CYGNUM_HAL_VECTOR_AUTOVEC4 28
|
| 93 |
|
|
#define CYGNUM_HAL_VECTOR_AUTOVEC5 29
|
| 94 |
|
|
#define CYGNUM_HAL_VECTOR_AUTOVEC6 30
|
| 95 |
|
|
#define CYGNUM_HAL_VECTOR_AUTOVEC7 31
|
| 96 |
|
|
#define CYGNUM_HAL_NUMAUTOVEC 7
|
| 97 |
|
|
|
| 98 |
|
|
#define CYGNUM_HAL_VECTOR_TRAPFIRST 32
|
| 99 |
|
|
#define CYGNUM_HAL_VECTOR_TRAPLAST 47
|
| 100 |
|
|
#define CYGNUM_HAL_NUMTRAPS 16
|
| 101 |
|
|
|
| 102 |
|
|
#define CYGNUM_HAL_VECTOR_FP_BRANCH 48
|
| 103 |
|
|
#define CYGNUM_HAL_VECTOR_FP_INEXACT 49
|
| 104 |
|
|
#define CYGNUM_HAL_VECTOR_FP_ZERODIV 50
|
| 105 |
|
|
#define CYGNUM_HAL_VECTOR_FP_UNDERFLOW 51
|
| 106 |
|
|
#define CYGNUM_HAL_VECTOR_FP_OPERAND 52
|
| 107 |
|
|
#define CYGNUM_HAL_VECTOR_FP_OVERFLOW 53
|
| 108 |
|
|
#define CYGNUM_HAL_VECTOR_FP_NAN 54
|
| 109 |
|
|
#define CYGNUM_HAL_VECTOR_FP_DENORM 55
|
| 110 |
|
|
|
| 111 |
|
|
// Exception vectors 56-60 are reserved
|
| 112 |
|
|
|
| 113 |
|
|
#define CYGNUM_HAL_VECTOR_UNSUPINST 61
|
| 114 |
|
|
|
| 115 |
|
|
// Exception vectors 62-63 are reserved
|
| 116 |
|
|
|
| 117 |
|
|
#define CYGNUM_HAL_VECTOR_USERINTRFIRST 64
|
| 118 |
|
|
#define CYGNUM_HAL_VECTOR_USERINTRLAST 255
|
| 119 |
|
|
#define CYGNUM_HAL_NUMUSERINTR 192
|
| 120 |
|
|
|
| 121 |
|
|
// -------------------------------------------------------------------------
|
| 122 |
|
|
// Interrupt and exception vector table definitions.
|
| 123 |
|
|
|
| 124 |
|
|
#define CYGNUM_HAL_VSR_MIN 0
|
| 125 |
|
|
#define CYGNUM_HAL_VSR_MAX 255
|
| 126 |
|
|
#define CYGNUM_HAL_VSR_COUNT (CYGNUM_HAL_VSR_MAX - CYGNUM_HAL_VSR_MIN + 1)
|
| 127 |
|
|
|
| 128 |
|
|
// To simplify things in interrupt handling code, we don't take into account
|
| 129 |
|
|
// autovectored, spurious and uninitialized interrupts.
|
| 130 |
|
|
|
| 131 |
|
|
#ifndef CYGNUM_HAL_ISR_RANGE_DEFINED
|
| 132 |
|
|
#define CYGNUM_HAL_ISR_MIN CYGNUM_HAL_VECTOR_USERINTRFIRST
|
| 133 |
|
|
#define CYGNUM_HAL_ISR_MAX CYGNUM_HAL_VECTOR_USERINTRLAST
|
| 134 |
|
|
#define CYGNUM_HAL_ISR_COUNT (CYGNUM_HAL_ISR_MAX - CYGNUM_HAL_ISR_MIN + 1)
|
| 135 |
|
|
#endif
|
| 136 |
|
|
|
| 137 |
|
|
#ifndef CYGNUM_HAL_EXCEPTION_RANGE_DEFINED
|
| 138 |
|
|
#define CYGNUM_HAL_EXCEPTION_MIN CYGNUM_HAL_VECTOR_BUSERR
|
| 139 |
|
|
#define CYGNUM_HAL_EXCEPTION_MAX CYGNUM_HAL_VECTOR_UNSUPINST
|
| 140 |
|
|
#define CYGNUM_HAL_EXCEPTION_COUNT (CYGNUM_HAL_EXCEPTION_MAX -\
|
| 141 |
|
|
CYGNUM_HAL_EXCEPTION_MIN + 1)
|
| 142 |
|
|
#endif
|
| 143 |
|
|
|
| 144 |
|
|
// -------------------------------------------------------------------------
|
| 145 |
|
|
// Equivalence between ColdFire exception names and target independent
|
| 146 |
|
|
// exception names.
|
| 147 |
|
|
// These are the values used when passed out to an
|
| 148 |
|
|
// external exception handler using cyg_hal_deliver_exception().
|
| 149 |
|
|
|
| 150 |
|
|
#define CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION CYGNUM_HAL_VECTOR_ILLINST
|
| 151 |
|
|
#define CYGNUM_HAL_EXCEPTION_DIV_BY_ZERO CYGNUM_HAL_VECTOR_ZERODIV
|
| 152 |
|
|
#define CYGNUM_HAL_EXCEPTION_DATA_ACCESS CYGNUM_HAL_VECTOR_BUSERR
|
| 153 |
|
|
#define CYGNUM_HAL_EXCEPTION_CODE_ACCESS CYGNUM_HAL_VECTOR_BUSERR
|
| 154 |
|
|
|
| 155 |
|
|
// -------------------------------------------------------------------------
|
| 156 |
|
|
// Spurious interrupt definition.
|
| 157 |
|
|
|
| 158 |
|
|
#ifndef CYGNUM_HAL_SPURIOUS_INTERRUPT
|
| 159 |
|
|
#define CYGNUM_HAL_SPURIOUS_INTERRUPT CYGNUM_HAL_VECTOR_SPURINT
|
| 160 |
|
|
#endif
|
| 161 |
|
|
|
| 162 |
|
|
// -------------------------------------------------------------------------
|
| 163 |
|
|
// Static data used by HAL.
|
| 164 |
|
|
|
| 165 |
|
|
// ISR tables
|
| 166 |
|
|
externC volatile CYG_ADDRESS cyg_hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT];
|
| 167 |
|
|
externC volatile CYG_ADDRWORD cyg_hal_interrupt_data[CYGNUM_HAL_ISR_COUNT];
|
| 168 |
|
|
externC volatile CYG_ADDRESS cyg_hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT];
|
| 169 |
|
|
|
| 170 |
|
|
// VSR table
|
| 171 |
|
|
externC volatile CYG_ADDRESS cyg_hal_vsr_table[CYGNUM_HAL_VSR_COUNT];
|
| 172 |
|
|
|
| 173 |
|
|
// ROM VSR table
|
| 174 |
|
|
externC CYG_ADDRESS rom_vsr_table[CYGNUM_HAL_VSR_COUNT];
|
| 175 |
|
|
|
| 176 |
|
|
// -------------------------------------------------------------------------
|
| 177 |
|
|
// Interrupt stack definitions.
|
| 178 |
|
|
|
| 179 |
|
|
#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
|
| 180 |
|
|
|
| 181 |
|
|
externC void hal_interrupt_stack_call_pending_DSRs(void);
|
| 182 |
|
|
#define HAL_INTERRUPT_STACK_CALL_PENDING_DSRS() \
|
| 183 |
|
|
hal_interrupt_stack_call_pending_DSRs()
|
| 184 |
|
|
|
| 185 |
|
|
#endif
|
| 186 |
|
|
|
| 187 |
|
|
// A separate stack always exist to allow the processor to initialize itself.
|
| 188 |
|
|
// It depends on CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK macro
|
| 189 |
|
|
// definition if this stack is used for interrupts too.
|
| 190 |
|
|
|
| 191 |
|
|
#define HAL_INTERRUPT_STACK_BASE cyg_interrupt_stack_base
|
| 192 |
|
|
#define HAL_INTERRUPT_STACK_TOP cyg_interrupt_stack
|
| 193 |
|
|
|
| 194 |
|
|
externC char HAL_INTERRUPT_STACK_BASE[];
|
| 195 |
|
|
externC char HAL_INTERRUPT_STACK_TOP[];
|
| 196 |
|
|
|
| 197 |
|
|
// --------------------------------------------------------------------------
|
| 198 |
|
|
// Translate a vector number into an ISR table index.
|
| 199 |
|
|
|
| 200 |
|
|
#ifndef HAL_TRANSLATE_VECTOR
|
| 201 |
|
|
#define HAL_TRANSLATE_VECTOR(_vector_,_index_) (_index_) = (_vector_- CYGNUM_HAL_ISR_MIN)
|
| 202 |
|
|
#endif
|
| 203 |
|
|
|
| 204 |
|
|
// -------------------------------------------------------------------------
|
| 205 |
|
|
// Interrupt state storage.
|
| 206 |
|
|
|
| 207 |
|
|
typedef cyg_uint16 CYG_INTERRUPT_STATE;
|
| 208 |
|
|
|
| 209 |
|
|
// --------------------------------------------------------------------------
|
| 210 |
|
|
// Interrupt and VSR attachment macros.
|
| 211 |
|
|
|
| 212 |
|
|
externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data);
|
| 213 |
|
|
|
| 214 |
|
|
externC void hal_default_exception_handler(CYG_WORD vector,
|
| 215 |
|
|
HAL_SavedRegisters *regs);
|
| 216 |
|
|
|
| 217 |
|
|
#define HAL_INTERRUPT_IN_USE( _vector_, _state_) \
|
| 218 |
|
|
CYG_MACRO_START \
|
| 219 |
|
|
cyg_uint32 _index_; \
|
| 220 |
|
|
HAL_TRANSLATE_VECTOR ((_vector_), _index_); \
|
| 221 |
|
|
\
|
| 222 |
|
|
if (cyg_hal_interrupt_handlers[_index_] \
|
| 223 |
|
|
== (CYG_ADDRESS) &hal_default_isr) \
|
| 224 |
|
|
(_state_) = 0; \
|
| 225 |
|
|
else \
|
| 226 |
|
|
(_state_) = 1; \
|
| 227 |
|
|
CYG_MACRO_END
|
| 228 |
|
|
|
| 229 |
|
|
#define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \
|
| 230 |
|
|
CYG_MACRO_START \
|
| 231 |
|
|
cyg_uint32 _index_; \
|
| 232 |
|
|
HAL_TRANSLATE_VECTOR((_vector_), _index_); \
|
| 233 |
|
|
\
|
| 234 |
|
|
if (cyg_hal_interrupt_handlers[_index_] \
|
| 235 |
|
|
== (CYG_ADDRESS) &hal_default_isr) \
|
| 236 |
|
|
{ \
|
| 237 |
|
|
cyg_hal_interrupt_handlers[_index_] = (CYG_ADDRESS)(_isr_); \
|
| 238 |
|
|
cyg_hal_interrupt_data[_index_] = (CYG_ADDRWORD)(_data_); \
|
| 239 |
|
|
cyg_hal_interrupt_objects[_index_] = (CYG_ADDRESS)(_object_); \
|
| 240 |
|
|
} \
|
| 241 |
|
|
CYG_MACRO_END
|
| 242 |
|
|
|
| 243 |
|
|
#define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) \
|
| 244 |
|
|
CYG_MACRO_START \
|
| 245 |
|
|
cyg_uint32 _index_; \
|
| 246 |
|
|
HAL_INTERRUPT_MASK(_vector_); \
|
| 247 |
|
|
HAL_TRANSLATE_VECTOR((_vector_), _index_); \
|
| 248 |
|
|
if (cyg_hal_interrupt_handlers[_index_] \
|
| 249 |
|
|
== (CYG_ADDRESS)(_isr_)) \
|
| 250 |
|
|
{ \
|
| 251 |
|
|
cyg_hal_interrupt_handlers[_index_] = \
|
| 252 |
|
|
(CYG_ADDRESS)&hal_default_isr; \
|
| 253 |
|
|
cyg_hal_interrupt_data[_index_] = 0; \
|
| 254 |
|
|
cyg_hal_interrupt_objects[_index_] = 0; \
|
| 255 |
|
|
} \
|
| 256 |
|
|
CYG_MACRO_END
|
| 257 |
|
|
|
| 258 |
|
|
#define HAL_VSR_GET( _vector_, _pvsr_ ) \
|
| 259 |
|
|
*((CYG_ADDRESS *)(_pvsr_)) = cyg_hal_vsr_table[(_vector_)];
|
| 260 |
|
|
|
| 261 |
|
|
|
| 262 |
|
|
#define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ ) \
|
| 263 |
|
|
CYG_MACRO_START \
|
| 264 |
|
|
if( (_poldvsr_) != NULL ) \
|
| 265 |
|
|
*(CYG_ADDRESS *)(_poldvsr_) = cyg_hal_vsr_table[(_vector_)]; \
|
| 266 |
|
|
cyg_hal_vsr_table[(_vector_)] = (CYG_ADDRESS)(_vsr_); \
|
| 267 |
|
|
CYG_MACRO_END
|
| 268 |
|
|
|
| 269 |
|
|
|
| 270 |
|
|
// This is an ugly name, but what it means is: grab the VSR back to eCos
|
| 271 |
|
|
// internal handling, or if you like, the default handler. But if
|
| 272 |
|
|
// cooperating with a ROM monitor, the default behaviour is to pass most
|
| 273 |
|
|
// exceptions to it. This macro undoes that so that eCos handles the
|
| 274 |
|
|
// exception. So use it with care.
|
| 275 |
|
|
|
| 276 |
|
|
#define HAL_VSR_SET_TO_ECOS_HANDLER( _vector_, _poldvsr_ ) \
|
| 277 |
|
|
CYG_MACRO_START \
|
| 278 |
|
|
if( (void*)_poldvsr_ != (void*)NULL ) \
|
| 279 |
|
|
*(CYG_ADDRESS *)_poldvsr_ = cyg_hal_vsr_table[_vector_]; \
|
| 280 |
|
|
cyg_hal_vsr_table[_vector_] = rom_vsr_table[_vector_]; \
|
| 281 |
|
|
CYG_MACRO_END
|
| 282 |
|
|
|
| 283 |
|
|
// -------------------------------------------------------------------------
|
| 284 |
|
|
// Interrupt control macros.
|
| 285 |
|
|
|
| 286 |
|
|
// The following interrupt control macros are the default for the ColdFire
|
| 287 |
|
|
// architecture. Some processor variants will override these definitions in
|
| 288 |
|
|
// their var_intr.h file.
|
| 289 |
|
|
|
| 290 |
|
|
#ifndef HAL_CF_SET_SR
|
| 291 |
|
|
#define HAL_CF_SET_SR(__newsr__) \
|
| 292 |
|
|
CYG_MACRO_START \
|
| 293 |
|
|
asm volatile ("move.w %0,%%sr\n" \
|
| 294 |
|
|
: \
|
| 295 |
|
|
: "d" ((CYG_INTERRUPT_STATE)(__newsr__))); \
|
| 296 |
|
|
CYG_MACRO_END
|
| 297 |
|
|
#endif // HAL_CF_SET_SR
|
| 298 |
|
|
|
| 299 |
|
|
#ifndef HAL_ENABLE_INTERRUPTS
|
| 300 |
|
|
#define HAL_ENABLE_INTERRUPTS() \
|
| 301 |
|
|
CYG_MACRO_START \
|
| 302 |
|
|
CYG_INTERRUPT_STATE _msk_; \
|
| 303 |
|
|
HAL_QUERY_INTERRUPTS(_msk_); \
|
| 304 |
|
|
HAL_CF_SET_SR((_msk_ & (CYG_INTERRUPT_STATE)0xf8ff)); \
|
| 305 |
|
|
CYG_MACRO_END
|
| 306 |
|
|
#endif // HAL_ENABLE_INTERRUPTS
|
| 307 |
|
|
|
| 308 |
|
|
#ifndef HAL_DISABLE_INTERRUPTS
|
| 309 |
|
|
#define HAL_DISABLE_INTERRUPTS(_old_) \
|
| 310 |
|
|
CYG_MACRO_START \
|
| 311 |
|
|
HAL_QUERY_INTERRUPTS(_old_); \
|
| 312 |
|
|
HAL_CF_SET_SR((_old_ | (CYG_INTERRUPT_STATE)0x0700)); \
|
| 313 |
|
|
CYG_MACRO_END
|
| 314 |
|
|
#endif //HAL_DISABLE_INTERRUPTS
|
| 315 |
|
|
|
| 316 |
|
|
#ifndef HAL_RESTORE_INTERRUPTS
|
| 317 |
|
|
#define HAL_RESTORE_INTERRUPTS(_prev_) \
|
| 318 |
|
|
CYG_MACRO_START \
|
| 319 |
|
|
CYG_INTERRUPT_STATE _msk_; \
|
| 320 |
|
|
HAL_QUERY_INTERRUPTS(_msk_); \
|
| 321 |
|
|
_msk_ &= (CYG_INTERRUPT_STATE)0xf8ff; \
|
| 322 |
|
|
_msk_ |= (((CYG_INTERRUPT_STATE)(_prev_)) \
|
| 323 |
|
|
& (CYG_INTERRUPT_STATE)0x0700); \
|
| 324 |
|
|
asm volatile ("move.w %0,%%sr\n" \
|
| 325 |
|
|
: \
|
| 326 |
|
|
: "d" (_msk_)); \
|
| 327 |
|
|
CYG_MACRO_END
|
| 328 |
|
|
#endif // HAL_RESTORE_INTERRUPTS
|
| 329 |
|
|
|
| 330 |
|
|
// Use the extra assignment to avoid warnings.
|
| 331 |
|
|
// The compiler should optimize it out.
|
| 332 |
|
|
#ifndef HAL_QUERY_INTERRUPTS
|
| 333 |
|
|
#define HAL_QUERY_INTERRUPTS(__oldmask__) \
|
| 334 |
|
|
CYG_MACRO_START \
|
| 335 |
|
|
CYG_INTERRUPT_STATE _omsk_ = (CYG_INTERRUPT_STATE)(__oldmask__); \
|
| 336 |
|
|
asm volatile ("move.w %%sr,%0\n" \
|
| 337 |
|
|
: "=d" (_omsk_) \
|
| 338 |
|
|
: ); \
|
| 339 |
|
|
(__oldmask__) = (__typeof__(__oldmask__))_omsk_; \
|
| 340 |
|
|
CYG_MACRO_END
|
| 341 |
|
|
#endif // HAL_QUERY_INTERRUPTS
|
| 342 |
|
|
|
| 343 |
|
|
// ---------------------------------------------------------------------------
|
| 344 |
|
|
// End of hal_intr.h
|
| 345 |
|
|
#endif // ifndef CYGONCE_HAL_HAL_INTR_H
|
