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| variant.S
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| MCF5272 variant code
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|==========================================================================
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| ####ECOSGPLCOPYRIGHTBEGIN####
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| -------------------------------------------
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| This file is part of eCos, the Embedded Configurable Operating System.
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| Copyright (C) 1998, 1999, 2000, 2001, 2002, 2006 Free Software Foundation, Inc.
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| eCos is free software; you can redistribute it and/or modify it under
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| the terms of the GNU General Public License as published by the Free
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| Software Foundation; either version 2 or (at your option) any later
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| version.
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| eCos is distributed in the hope that it will be useful, but WITHOUT
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| ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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| FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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| You should have received a copy of the GNU General Public License
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| along with eCos; if not, write to the Free Software Foundation, Inc.,
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| 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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| As a special exception, if other files instantiate templates or use
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| macros or inline functions from this file, or you compile this file
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| this file does not by itself cause the resulting work to be covered by
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| the GNU General Public License. However the source code for this file
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| must still be made available in accordance with section (3) of the GNU
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| General Public License v2.
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| This exception does not invalidate any other reasons why a work based
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| on this file might be covered by the GNU General Public License.
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| -------------------------------------------
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| ####ECOSGPLCOPYRIGHTEND####
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|=============================================================================
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|#####DESCRIPTIONBEGIN####
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| Author(s): Enrico Piria
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| Contributors:
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| Date: 2005-25-06
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| Purpose: MCF5272 variant code.
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| Description: This file contains the VSR table for the MCF5272, and
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| other definitions used by the rest of the ColdFire HAL.
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|####DESCRIPTIONEND####
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|==========================================================================
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#include
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#include
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| ----------------------------------------------------------------------------
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| ROM vector table
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.section ".romvec","ax"
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.extern cyg_interrupt_stack
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.extern cyg_hal_reset_vsr
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.extern cyg_hal_default_exception_vsr
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.extern cyg_hal_default_spurious_vsr
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.extern cyg_hal_default_interrupt_vsr
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.globl rom_vsr_table
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rom_vsr_table:
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| 0 - Initial SSP
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.long cyg_interrupt_stack
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| 1 - Initial PC
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.long cyg_hal_reset_vsr
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| 2-14 - Default exception handlers
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.rept 14-2+1
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.long cyg_hal_default_exception_vsr
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.endr
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| 15 - Uninitialized interrupt. It should never happen, because
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| we configure interrupt controller at startup.
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.long cyg_hal_default_spurious_vsr
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| 16-23 - Reserved, treat as exceptions
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.rept 23-16+1
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.long cyg_hal_default_exception_vsr
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.endr
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| 24 - Spurious interrupt
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.long cyg_hal_default_spurious_vsr
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| 25-31 - Autovectored interrupts 1-7. Not used in MCF5272.
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.rept 31-25+1
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.long cyg_hal_default_interrupt_vsr
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.endr
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| 32-63 - Default exception handlers
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.rept 63-32+1
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.long cyg_hal_default_exception_vsr
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.endr
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| 64 - User spurious interrupt. The MCF5272 interrupt controller
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| returns this vector number instead of vector 24
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.long cyg_hal_default_spurious_vsr
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| 65-255 - User interrupt vectors
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.rept 255-65+1
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.long cyg_hal_default_interrupt_vsr
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.endr
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