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/*==========================================================================
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//
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// cortexm_stub.c
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//
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// Cortex-M GDB stub support
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//
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//==========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 2008 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): nickg
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// Date: 2008-07-30
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//
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//####DESCRIPTIONEND####
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//
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//========================================================================*/
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#include <stddef.h>
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#include <pkgconf/hal.h>
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#ifdef CYGPKG_REDBOOT
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#include <pkgconf/redboot.h>
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#endif
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#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
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#include <cyg/hal/hal_arch.h>
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#include <cyg/hal/hal_intr.h>
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#include <cyg/hal/hal_stub.h>
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//==========================================================================
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#ifndef FALSE
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#define FALSE 0
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#define TRUE 1
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#endif
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#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
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#include <cyg/hal/dbg-threads-api.h> // dbg_currthread_id
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#endif
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//==========================================================================
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/* Given a trap value TRAP, return the corresponding signal. */
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int __computeSignal (unsigned int trap_number)
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{
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switch (trap_number)
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{
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case CYGNUM_HAL_VECTOR_BUS_FAULT: // Fall through
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case CYGNUM_HAL_VECTOR_MEMORY_MAN: // Fall through
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return SIGBUS;
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case CYGNUM_HAL_VECTOR_NMI:
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case CYGNUM_HAL_VECTOR_SYS_TICK:
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return SIGINT;
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default:
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return SIGTRAP;
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}
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}
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//==========================================================================
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/* Return the trap number corresponding to the last-taken trap. */
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int __get_trap_number (void)
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{
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// The vector is not not part of the GDB register set so get it
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// directly from the save context.
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return _hal_registers->u.exception.vector;
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}
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//==========================================================================
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/* Set the currently-saved pc register value to PC. */
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void set_pc (target_register_t pc)
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{
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put_register (PC, pc);
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}
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//==========================================================================
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// Calculate byte offset a given register from start of register save area.
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static int
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reg_offset(regnames_t reg)
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{
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int base_offset;
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if (reg < F0)
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return reg * 4;
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base_offset = 16 * 4;
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if (reg < FPS)
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return base_offset + ((reg - F0) * 12);
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base_offset += (8 * 12);
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if (reg <= PS)
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return base_offset + ((reg - FPS) * 4);
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return -1; // Should never happen!
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}
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//==========================================================================
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// Return the currently-saved value corresponding to register REG of
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// the exception context.
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target_register_t
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get_register (regnames_t reg)
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{
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target_register_t val;
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int offset = reg_offset(reg);
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if (REGSIZE(reg) > sizeof(target_register_t) || offset == -1)
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return -1;
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val = _registers[offset/sizeof(target_register_t)];
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return val;
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}
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//==========================================================================
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// Store VALUE in the register corresponding to WHICH in the exception
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// context.
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void
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put_register (regnames_t which, target_register_t value)
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{
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int offset = reg_offset(which);
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if (REGSIZE(which) > sizeof(target_register_t) || offset == -1)
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return;
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_registers[offset/sizeof(target_register_t)] = value;
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}
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//==========================================================================
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// Write the contents of register WHICH into VALUE as raw bytes. This
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// is only used for registers larger than sizeof(target_register_t).
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// Return non-zero if it is a valid register.
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int
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get_register_as_bytes (regnames_t which, char *value)
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{
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int offset = reg_offset(which);
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if (offset != -1) {
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memcpy (value, (char *)_registers + offset, REGSIZE(which));
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return 1;
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}
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return 0;
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}
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//==========================================================================
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// Alter the contents of saved register WHICH to contain VALUE. This
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// is only used for registers larger than sizeof(target_register_t).
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// Return non-zero if it is a valid register.
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int
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put_register_as_bytes (regnames_t which, char *value)
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{
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int offset = reg_offset(which);
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if (offset != -1) {
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memcpy ((char *)_registers + offset, value, REGSIZE(which));
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return 1;
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}
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return 0;
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}
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//==========================================================================
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// Single step the processor.
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//
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// We do this by setting the MON_STEP bit in the DEMCR. So long as we
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// are in a DebugMonitor exception this will single step the CPU on
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// return.
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// We also need to block all pending interrupts by setting basepri
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// before doing the step. Otherwise an interrupt may be delivered
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// before the step happens, and may cause unpleasant things to happen.
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cyg_uint32 __single_step_basepri = 0;
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void __single_step (void)
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{
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CYG_ADDRESS base = CYGARC_REG_DEBUG_BASE;
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cyg_uint32 demcr;
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// Save basepri and set it to mask all interrupts.
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__single_step_basepri = _hal_registers->u.exception.basepri;
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_hal_registers->u.exception.basepri = CYGNUM_HAL_CORTEXM_PRIORITY_MAX;
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// Set MON_STEP
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HAL_READ_UINT32( base+CYGARC_REG_DEBUG_DEMCR, demcr );
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demcr |= CYGARC_REG_DEBUG_DEMCR_MON_STEP;
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HAL_WRITE_UINT32( base+CYGARC_REG_DEBUG_DEMCR, demcr );
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// Clear any bits set in DFSR
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base = CYGARC_REG_NVIC_BASE;
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HAL_WRITE_UINT32( base+CYGARC_REG_NVIC_DFSR, 0xFFFFFFFF );
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}
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//==========================================================================
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// Clear the single-step state.
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void __clear_single_step (void)
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{
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CYG_ADDRESS base = CYGARC_REG_DEBUG_BASE;
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cyg_uint32 demcr;
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// Restore basepri
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_hal_registers->u.exception.basepri = __single_step_basepri;
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// Clear MON_STEP
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HAL_READ_UINT32( base+CYGARC_REG_DEBUG_DEMCR, demcr );
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demcr &= ~CYGARC_REG_DEBUG_DEMCR_MON_STEP;
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HAL_WRITE_UINT32( base+CYGARC_REG_DEBUG_DEMCR, demcr );
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// Clear any bits set in DFSR
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base = CYGARC_REG_NVIC_BASE;
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HAL_WRITE_UINT32( base+CYGARC_REG_NVIC_DFSR, 0xFFFFFFFF );
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}
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//==========================================================================
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void __install_breakpoints (void)
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{
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__install_breakpoint_list();
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}
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//--------------------------------------------------------------------------
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void __clear_breakpoints (void)
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{
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__clear_breakpoint_list();
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}
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//--------------------------------------------------------------------------
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/* If the breakpoint we hit is in the breakpoint() instruction, return a
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non-zero value. */
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int
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__is_breakpoint_function ()
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{
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return get_register (PC) == (target_register_t)&_breakinst;
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}
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//--------------------------------------------------------------------------
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/* Skip the current instruction. Since this is only called by the
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stub when the PC points to a breakpoint or trap instruction,
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we can safely just skip 2. */
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void __skipinst (void)
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{
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unsigned long pc = get_register(PC);
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pc += 2;
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put_register(PC, pc);
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}
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//==========================================================================
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#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
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