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#ifndef CYGONCE_HAL_PLF_IO_H
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#define CYGONCE_HAL_PLF_IO_H
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//=============================================================================
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//
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// plf_io.h
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//
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// Platform specific registers
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 2011 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): ilijak
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// Date: 2011-02-05
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// Purpose: TWR-K40X256 platform specific registers
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// Description:
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// Usage: #include <cyg/hal/plf_io.h>
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//
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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#include <pkgconf/hal.h>
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#include <pkgconf/hal_cortexm_kinetis_twr_k40x256.h>
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// UART PINs
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#ifndef CYGHWR_HAL_FREESCALE_UART3_PIN_RX
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# define CYGHWR_HAL_FREESCALE_UART3_PIN_RX CYGHWR_HAL_KINETIS_PIN(C, 16, 3, 0)
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# define CYGHWR_HAL_FREESCALE_UART3_PIN_TX CYGHWR_HAL_KINETIS_PIN(C, 17, 3, 0)
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# define CYGHWR_HAL_FREESCALE_UART3_PIN_RTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_HAL_FREESCALE_UART3_PIN_CTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_IO_FREESCALE_UART3_PIN_RX CYGHWR_HAL_FREESCALE_UART3_PIN_RX
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# define CYGHWR_IO_FREESCALE_UART3_PIN_TX CYGHWR_HAL_FREESCALE_UART3_PIN_TX
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# define CYGHWR_IO_FREESCALE_UART3_PIN_RTS CYGHWR_HAL_FREESCALE_UART3_PIN_RTS
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# define CYGHWR_IO_FREESCALE_UART3_PIN_CTS CYGHWR_HAL_FREESCALE_UART3_PIN_CTS
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#endif
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// DSPI
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// DSPI Pins
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#define CYGHWR_IO_FREESCALE_SPI1_PIN_SIN CYGHWR_HAL_KINETIS_PIN(E, 3, 2, KINETIS_PIN_SPI1_IN_OPT)
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#define CYGHWR_IO_FREESCALE_SPI1_PIN_SOUT CYGHWR_HAL_KINETIS_PIN(E, 1, 2, KINETIS_PIN_SPI1_OUT_OPT)
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#define CYGHWR_IO_FREESCALE_SPI1_PIN_SCK CYGHWR_HAL_KINETIS_PIN(E, 2, 2, KINETIS_PIN_SPI1_OUT_OPT)
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#define CYGHWR_IO_FREESCALE_SPI1_PIN_CS0 CYGHWR_HAL_KINETIS_PIN(E, 4, 2, KINETIS_PIN_SPI1_CS_OPT)
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#define CYGHWR_IO_FREESCALE_SPI1_PIN_CS1 CYGHWR_HAL_KINETIS_PIN(E, 0, 2, KINETIS_PIN_SPI1_CS_OPT)
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#define CYGHWR_IO_FREESCALE_SPI1_PIN_CS2 CYGHWR_HAL_KINETIS_PIN(E, 5, 2, KINETIS_PIN_SPI1_CS_OPT)
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#define CYGHWR_IO_FREESCALE_SPI1_PIN_CS3 CYGHWR_HAL_KINETIS_PIN(E, 6, 2, KINETIS_PIN_SPI1_CS_OPT)
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#define CYGHWR_IO_FREESCALE_SPI1_PIN_CS4 CYGHWR_HAL_KINETIS_PIN_NONE
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#define CYGHWR_IO_FREESCALE_SPI1_PIN_CS5 CYGHWR_HAL_KINETIS_PIN_NONE
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//=============================================================================
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// Memory access checks.
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//
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// Accesses to areas not backed by real devices or memory can cause
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// the CPU to hang. These macros allow the GDB stubs to avoid making
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// accidental accesses to these areas.
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__externC int cyg_hal_stub_permit_data_access( CYG_ADDRESS addr, cyg_uint32 count );
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#define CYG_HAL_STUB_PERMIT_DATA_READ(_addr_, _count_) cyg_hal_stub_permit_data_access( _addr_, _count_ )
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#define CYG_HAL_STUB_PERMIT_DATA_WRITE(_addr_, _count_ ) cyg_hal_stub_permit_data_access( _addr_, _count_ )
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//=============================================================================
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//-----------------------------------------------------------------------------
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// end of plf_io.h
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#endif // CYGONCE_HAL_PLF_IO_H
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