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#ifndef CYGONCE_HAL_VAR_IO_DEVS_H
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#define CYGONCE_HAL_VAR_IO_DEVS_H
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//===========================================================================
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//
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// var_io_devs.h
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//
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// Variant specific registers
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//
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//===========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 2011 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//===========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): Ilija Kocho <ilijak@siva.com.mk>
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// Date: 2011-02-05
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// Purpose: Kinetis variant IO provided to various device drivers
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// Description:
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// Usage: #include <cyg/hal/var_io.h> //var_io.h includes this file
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//
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//####DESCRIPTIONEND####
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//
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//===========================================================================
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//=============================================================================
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// DEVS:
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// Following macros may be, and usually are borrwed by some device drivers.
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//=============================================================================
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// Peripheral clock
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//
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//===========================================================================
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//=============================================================================
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// DEVS:
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// Following macros may be, and usually are borrwed by some device drivers.
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// Peripheral clock [Hz];
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__externC cyg_uint32 hal_get_peripheral_clock(void);
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//-----------------------------------------------------------------------------
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// Freescale UART
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// Borrow some HAL resources to Freescale UART driver
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// UART macros are used by both:
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// src/hal_diag.c
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// devs/serial/<version>/src/ser_freescale_uart.c
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#define CYGADDR_IO_SERIAL_FREESCALE_UART0_BASE 0x4006A000
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#define CYGADDR_IO_SERIAL_FREESCALE_UART1_BASE 0x4006B000
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#define CYGADDR_IO_SERIAL_FREESCALE_UART2_BASE 0x4006C000
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#define CYGADDR_IO_SERIAL_FREESCALE_UART3_BASE 0x4006D000
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#define CYGADDR_IO_SERIAL_FREESCALE_UART4_BASE 0x400EA000
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#define CYGADDR_IO_SERIAL_FREESCALE_UART5_BASE 0x400EB000
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// UART PIN configuration
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// Note: May be overriden by plf_io.h
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#define CYGHWR_HAL_KINETIS_PORT_PIN_NONE CYGHWR_HAL_KINETIS_PIN_NONE
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#ifndef CYGHWR_IO_FREESCALE_UART0_PIN_RX
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# define CYGHWR_IO_FREESCALE_UART0_PIN_RX CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_IO_FREESCALE_UART0_PIN_TX CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_IO_FREESCALE_UART0_PIN_RTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_IO_FREESCALE_UART0_PIN_CTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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#endif
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#ifndef CYGHWR_IO_FREESCALE_UART1_PIN_RX
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# define CYGHWR_IO_FREESCALE_UART1_PIN_RX CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_IO_FREESCALE_UART1_PIN_TX CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_IO_FREESCALE_UART1_PIN_RTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_IO_FREESCALE_UART1_PIN_CTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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#endif
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#ifndef CYGHWR_IO_FREESCALE_UART2_PIN_RX
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# define CYGHWR_IO_FREESCALE_UART2_PIN_RX CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_IO_FREESCALE_UART2_PIN_TX CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_IO_FREESCALE_UART2_PIN_RTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_IO_FREESCALE_UART2_PIN_CTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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#endif
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#ifndef CYGHWR_IO_FREESCALE_UART3_PIN_RX
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# define CYGHWR_IO_FREESCALE_UART3_PIN_RX CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_IO_FREESCALE_UART3_PIN_TX CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_IO_FREESCALE_UART3_PIN_RTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_IO_FREESCALE_UART3_PIN_CTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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#endif
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#ifndef CYGHWR_IO_FREESCALE_UART4_PIN_RX
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# define CYGHWR_IO_FREESCALE_UART4_PIN_RX CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_IO_FREESCALE_UART4_PIN_TX CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_IO_FREESCALE_UART4_PIN_RTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_IO_FREESCALE_UART4_PIN_CTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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#endif
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#ifndef CYGHWR_IO_FREESCALE_UART5_PIN_RX
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# define CYGHWR_IO_FREESCALE_UART5_PIN_RX CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_IO_FREESCALE_UART5_PIN_TX CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_IO_FREESCALE_UART5_PIN_RTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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# define CYGHWR_IO_FREESCALE_UART5_PIN_CTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE
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#endif
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// Lend some HAL dependent functions to the UART serial device driver
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#ifndef __ASSEMBLER__
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# define CYGHWR_IO_FREESCALE_UART_BAUD_SET(__uart_p, _baud_) \
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hal_freescale_uart_setbaud(__uart_p, _baud_)
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# define CYGHWR_IO_FREESCALE_UART_PIN(__pin) \
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hal_set_pin_function(__pin)
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// Set baud rate
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__externC void hal_freescale_uart_setbaud( CYG_ADDRESS uart, cyg_uint32 baud );
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#endif
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//---------------------------------------------------------------------------
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// ENET
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// Lend some HAL dependent functions to the Ethernet device driver
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#define CYGADDR_IO_ETH_FREESCALE_ENET0_BASE (0x400C0000)
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#ifndef __ASSEMBLER__
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# define CYGHWR_IO_FREESCALE_ENET_PIN(__pin) \
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hal_set_pin_function(__pin)
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#endif
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//----------------------------------------------------------------------------
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// DSPI
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// Lend some HAL dependent macros to DSPI device driver
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// DSPI - Peripheral instance base addresses
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#define CYGADDR_IO_SPI_FREESCALE_DSPI0_P ((cyghwr_devs_freescale_dspi_t*)0x4002C000)
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#define CYGADDR_IO_SPI_FREESCALE_DSPI1_P ((cyghwr_devs_freescale_dspi_t*)0x4002D000)
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#define CYGADDR_IO_SPI_FREESCALE_DSPI2_P ((cyghwr_devs_freescale_dspi_t*)0x400AC000)
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#define CYGHWR_IO_SPI_FREESCALE_DSPI_CLOCK hal_get_peripheral_clock();
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#ifndef __ASSEMBLER__
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# define CYGHWR_IO_FREESCALE_DSPI_PIN(__pin) \
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hal_set_pin_function(__pin)
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#endif
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#ifndef KINETIS_PIN_SPI0_OUT_OPT
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#define KINETIS_PIN_SPI0_OUT_OPT (CYGHWR_HAL_KINETIS_PORT_PCR_DSE_M | \
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CYGHWR_HAL_KINETIS_PORT_PCR_SRE_M)
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#endif
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#ifndef KINETIS_PIN_SPI0_CS_OPT
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#define KINETIS_PIN_SPI0_CS_OPT (CYGHWR_HAL_KINETIS_PORT_PCR_DSE_M | \
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CYGHWR_HAL_KINETIS_PORT_PCR_SRE_M)
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#endif
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#ifndef KINETIS_PIN_SPI0_IN_OPT
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#define KINETIS_PIN_SPI0_IN_OPT (CYGHWR_HAL_KINETIS_PORT_PCR_PE_M | \
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CYGHWR_HAL_KINETIS_PORT_PCR_PS_M)
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#endif
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#ifndef KINETIS_PIN_SPI1_OUT_OPT
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#define KINETIS_PIN_SPI1_OUT_OPT (CYGHWR_HAL_KINETIS_PORT_PCR_DSE_M | \
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CYGHWR_HAL_KINETIS_PORT_PCR_SRE_M)
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#endif
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#ifndef KINETIS_PIN_SPI1_CS_OPT
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#define KINETIS_PIN_SPI1_CS_OPT (CYGHWR_HAL_KINETIS_PORT_PCR_DSE_M | \
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CYGHWR_HAL_KINETIS_PORT_PCR_SRE_M)
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#endif
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#ifndef KINETIS_PIN_SPI1_IN_OPT
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#define KINETIS_PIN_SPI1_IN_OPT (CYGHWR_HAL_KINETIS_PORT_PCR_PE_M | \
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CYGHWR_HAL_KINETIS_PORT_PCR_PS_M)
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#endif
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#ifndef KINETIS_PIN_SPI2_OUT_OPT
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#define KINETIS_PIN_SPI2_OUT_OPT (CYGHWR_HAL_KINETIS_PORT_PCR_DSE_M | \
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CYGHWR_HAL_KINETIS_PORT_PCR_SRE_M)
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#endif
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#ifndef KINETIS_PIN_SPI2_CS_OPT
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#define KINETIS_PIN_SPI2_CS_OPT (CYGHWR_HAL_KINETIS_PORT_PCR_DSE_M | \
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CYGHWR_HAL_KINETIS_PORT_PCR_SRE_M)
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#endif
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#ifndef KINETIS_PIN_SPI2_IN_OPT
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#define KINETIS_PIN_SPI2_IN_OPT (CYGHWR_HAL_KINETIS_PORT_PCR_PE_M | \
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CYGHWR_HAL_KINETIS_PORT_PCR_PS_M)
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#endif
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// DMA MUX ------------------------------------------------------------------
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// DMAMUX DMA request sources
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#define FREESCALE_DMAMUX_SRC_KINETIS_DISABLE 0
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#define FREESCALE_DMAMUX_SRC_KINETIS_RESERVE 1
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#define FREESCALE_DMAMUX_SRC_KINETIS_UART0R 2
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#define FREESCALE_DMAMUX_SRC_KINETIS_UART0T 3
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#define FREESCALE_DMAMUX_SRC_KINETIS_UART1R 4
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#define FREESCALE_DMAMUX_SRC_KINETIS_UART1T 5
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#define FREESCALE_DMAMUX_SRC_KINETIS_UART2R 6
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#define FREESCALE_DMAMUX_SRC_KINETIS_UART2T 7
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#define FREESCALE_DMAMUX_SRC_KINETIS_UART3R 8
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#define FREESCALE_DMAMUX_SRC_KINETIS_UART3T 9
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#define FREESCALE_DMAMUX_SRC_KINETIS_UART4R 10
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#define FREESCALE_DMAMUX_SRC_KINETIS_UART4T 11
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#define FREESCALE_DMAMUX_SRC_KINETIS_UART5R 12
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#define FREESCALE_DMAMUX_SRC_KINETIS_UART5T 13
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#define FREESCALE_DMAMUX_SRC_KINETIS_I2S0R 14
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#define FREESCALE_DMAMUX_SRC_KINETIS_I3S0T 15
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#define FREESCALE_DMAMUX_SRC_KINETIS_SPI0R 16
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#define FREESCALE_DMAMUX_SRC_KINETIS_SPI0T 17
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#define FREESCALE_DMAMUX_SRC_KINETIS_SPI1R 18
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#define FREESCALE_DMAMUX_SRC_KINETIS_SPI1T 19
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#define FREESCALE_DMAMUX_SRC_KINETIS_SPI2R 20
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#define FREESCALE_DMAMUX_SRC_KINETIS_SPI2T 21
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#define FREESCALE_DMAMUX_SRC_KINETIS_I2C0 22
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#define FREESCALE_DMAMUX_SRC_KINETIS_I2C1 23
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#define FREESCALE_DMAMUX_SRC_KINETIS_FTM0C0 24
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#define FREESCALE_DMAMUX_SRC_KINETIS_FTM0C1 25
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#define FREESCALE_DMAMUX_SRC_KINETIS_FTM0C2 26
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#define FREESCALE_DMAMUX_SRC_KINETIS_FTM0C3 27
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#define FREESCALE_DMAMUX_SRC_KINETIS_FTM0C4 28
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#define FREESCALE_DMAMUX_SRC_KINETIS_FTM0C5 29
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#define FREESCALE_DMAMUX_SRC_KINETIS_FTM0C6 30
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#define FREESCALE_DMAMUX_SRC_KINETIS_FTM0C7 31
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#define FREESCALE_DMAMUX_SRC_KINETIS_FTM1C0 32
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#define FREESCALE_DMAMUX_SRC_KINETIS_FTM1C1 33
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#define FREESCALE_DMAMUX_SRC_KINETIS_FTM2C0 34
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#define FREESCALE_DMAMUX_SRC_KINETIS_FTM2C1 35
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#define FREESCALE_DMAMUX_SRC_KINETIS_1588T0 36
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#define FREESCALE_DMAMUX_SRC_KINETIS_1588T1 37
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#define FREESCALE_DMAMUX_SRC_KINETIS_1588T2 38
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#define FREESCALE_DMAMUX_SRC_KINETIS_1588T3 39
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#define FREESCALE_DMAMUX_SRC_KINETIS_ADC0 40
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#define FREESCALE_DMAMUX_SRC_KINETIS_ADC1 41
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#define FREESCALE_DMAMUX_SRC_KINETIS_CMP0 42
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#define FREESCALE_DMAMUX_SRC_KINETIS_CMP1 43
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#define FREESCALE_DMAMUX_SRC_KINETIS_CMP2 44
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#define FREESCALE_DMAMUX_SRC_KINETIS_DAC0 45
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#define FREESCALE_DMAMUX_SRC_KINETIS_DAC1 46
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#define FREESCALE_DMAMUX_SRC_KINETIS_CMT 47
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#define FREESCALE_DMAMUX_SRC_KINETIS_PDB 48
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#define FREESCALE_DMAMUX_SRC_KINETIS_PORTA 49
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#define FREESCALE_DMAMUX_SRC_KINETIS_PORTB 50
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#define FREESCALE_DMAMUX_SRC_KINETIS_PORTC 51
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273 |
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#define FREESCALE_DMAMUX_SRC_KINETIS_PORTD 52
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274 |
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#define FREESCALE_DMAMUX_SRC_KINETIS_PORTE 53
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275 |
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#define FREESCALE_DMAMUX_SRC_KINETIS_DMAMUX0 54
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276 |
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#define FREESCALE_DMAMUX_SRC_KINETIS_DMAMUX1 55
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277 |
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#define FREESCALE_DMAMUX_SRC_KINETIS_DMAMUX2 56
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278 |
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#define FREESCALE_DMAMUX_SRC_KINETIS_DMAMUX3 57
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279 |
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#define FREESCALE_DMAMUX_SRC_KINETIS_DMAMUX4 58
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280 |
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#define FREESCALE_DMAMUX_SRC_KINETIS_DMAMUX5 59
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281 |
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#define FREESCALE_DMAMUX_SRC_KINETIS_DMAMUX6 60
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282 |
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#define FREESCALE_DMAMUX_SRC_KINETIS_DMAMUX7 61
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283 |
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#define FREESCALE_DMAMUX_SRC_KINETIS_DMAMUX8 62
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284 |
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#define FREESCALE_DMAMUX_SRC_KINETIS_DMAMUX9 63
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285 |
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286 |
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#define FREESCALE_DMAMUX_SRC_SPI0_RX FREESCALE_DMAMUX_SRC_KINETIS_SPI0R
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287 |
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#define FREESCALE_DMAMUX_SRC_SPI0_TX FREESCALE_DMAMUX_SRC_KINETIS_SPI0T
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288 |
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#define FREESCALE_DMAMUX_SRC_SPI1_RX FREESCALE_DMAMUX_SRC_KINETIS_SPI1R
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289 |
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#define FREESCALE_DMAMUX_SRC_SPI1_TX FREESCALE_DMAMUX_SRC_KINETIS_SPI1T
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290 |
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#define FREESCALE_DMAMUX_SRC_SPI2_RX FREESCALE_DMAMUX_SRC_KINETIS_SPI2R
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291 |
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#define FREESCALE_DMAMUX_SRC_SPI2_TX FREESCALE_DMAMUX_SRC_KINETIS_SPI2T
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292 |
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|
293 |
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//----------------------------------------------------------------------------
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294 |
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// eDMA
|
295 |
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// Lend some eDMA macros to device driver that use DMA
|
296 |
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|
297 |
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// Base address
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298 |
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#define CYGHWR_IO_FREESCALE_EDMA0_P CYGHWR_HAL_FREESCALE_EDMA0_P
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299 |
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#define CYGHWR_IO_FREESCALE_DMAMUX0_P CYGHWR_HAL_FREESCALE_DMAMUX0_P
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300 |
|
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301 |
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//-----------------------------------------------------------------------------
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302 |
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// end of var_io_devs.h
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303 |
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#endif // CYGONCE_HAL_VAR_IO_DEVS_H
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