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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [cortexm/] [kinetis/] [var/] [current/] [include/] [var_io_gpio.h] - Blame information for rev 786

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1 786 skrzyp
#ifndef CYGONCE_HAL_VAR_IO_GPIO_H
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#define CYGONCE_HAL_VAR_IO_GPIO_H
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//===========================================================================
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//
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//      var_io_gpio.h
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//
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//      Kinetis GPIO
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//
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//===========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 2011 Free Software Foundation, Inc.                        
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//===========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):     Tomas Frydrych <tomas@sleepfive.com>
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// Date:          2011-11-14
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// Purpose:       Kinetis variant specific registers
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// Description:
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// Usage:         #include <cyg/hal/var_io.h>  // var_io.h includes this file
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//
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//####DESCRIPTIONEND####
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//
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//===========================================================================
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//---------------------------------------------------------------------------
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// GPIO
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typedef volatile struct cyghwr_hal_kinetis_gpio_s {
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  cyg_uint32 pdor;
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  cyg_uint32 psor;
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  cyg_uint32 pcor;
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  cyg_uint32 ptor;
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  cyg_uint32 pdir;
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  cyg_uint32 pddr;
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} cyghwr_hal_kinetis_gpio_t;
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// PTA-PTE base pointers
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#define CYGHWR_HAL_KINETIS_GPIO_PORTA_P ((cyghwr_hal_kinetis_gpio_t*)0x400FF000u)
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#define CYGHWR_HAL_KINETIS_GPIO_PORTB_P ((cyghwr_hal_kinetis_gpio_t*)0x400FF040u)
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#define CYGHWR_HAL_KINETIS_GPIO_PORTC_P ((cyghwr_hal_kinetis_gpio_t*)0x400FF080u)
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#define CYGHWR_HAL_KINETIS_GPIO_PORTD_P ((cyghwr_hal_kinetis_gpio_t*)0x400FF0C0u)
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#define CYGHWR_HAL_KINETIS_GPIO_PORTE_P ((cyghwr_hal_kinetis_gpio_t*)0x400FF100u)
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// GPIO register on a given port (register name is lower case)
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#define CYGHWR_HAL_KINETIS_GPIO(__port, __reg)           \
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  (CYGHWR_HAL_KINETIS_GPIO_PORT##__port##_P)->__reg
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// Get values for entire port
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#define CYGHWR_HAL_KINETIS_GPIO_GET(__port)              \
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  CYGHWR_HAL_KINETIS_GPIO(__port, pdir)
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// Output values for entire port
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#define CYGHWR_HAL_KINETIS_GPIO_PUT(__port, __val)       \
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  CYGHWR_HAL_KINETIS_GPIO(__port, pdor) = __val
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// Set values for entire port based on bitmask
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#define CYGHWR_HAL_KINETIS_GPIO_SET(__port, __val)       \
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  CYGHWR_HAL_KINETIS_GPIO(__port, psor) = __val
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// Clear values for entire port based on bitmask
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#define CYGHWR_HAL_KINETIS_GPIO_CLEAR(__port, __val)     \
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  CYGHWR_HAL_KINETIS_GPIO(__port, pcor) = __val
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// Toggle values for entire port based on bitmask
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#define CYGHWR_HAL_KINETIS_GPIO_TOGGLE(__port, __val)    \
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  CYGHWR_HAL_KINETIS_GPIO(__port, ptor) = __val
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// Get value for a single pin on given port
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#define CYGHWR_HAL_KINETIS_GPIO_GET_PIN(__port, __pin)   \
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  (BIT_(__pin) &  CYGHWR_HAL_KINETIS_GPIO_GET(__port))
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// Set a single pin on a given register
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#define CYGHWR_HAL_KINETIS_GPIO_SET_PIN(__port, __pin)   \
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  CYGHWR_HAL_KINETIS_GPIO_SET(__port, BIT_(__pin))
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// Clear a single pin on a given register
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#define CYGHWR_HAL_KINETIS_GPIO_CLEAR_PIN(__port, __pin) \
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  CYGHWR_HAL_KINETIS_GPIO_CLEAR(__port, BIT_(__pin))
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// Toggle a single pin on a given register
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#define CYGHWR_HAL_KINETIS_GPIO_TOGGLE_PIN(__port, __pin)  \
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  CYGHWR_HAL_KINETIS_GPIO_TOGGLE(__port, BIT_(__pin))
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// Set pin data direction
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#define CYGHWR_HAL_KINETIS_GPIO_PIN_DDR_OUT(__port, __pin) \
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  CYGHWR_HAL_KINETIS_GPIO(__port, pddr) |= BIT_(__pin)
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#define CYGHWR_HAL_KINETIS_GPIO_PIN_DDR_IN(__port, __pin)  \
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  CYGHWR_HAL_KINETIS_GPIO(__port, pddr) &= ~BIT_(__pin)
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//-----------------------------------------------------------------------------
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// end of var_io_gpio.h
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#endif // CYGONCE_HAL_VAR_IO_GPIO_H

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