OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [cortexm/] [lpc17xx/] [lpc1766stk/] [current/] [include/] [plf_io.h] - Blame information for rev 817

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 786 skrzyp
#ifndef CYGONCE_HAL_PLF_IO_H
2
#define CYGONCE_HAL_PLF_IO_H
3
//=============================================================================
4
//
5
//      plf_io.h
6
//
7
//      Platform specific registers
8
//
9
//=============================================================================
10
// ####ECOSGPLCOPYRIGHTBEGIN####                                            
11
// -------------------------------------------                              
12
// This file is part of eCos, the Embedded Configurable Operating System.   
13
// Copyright (C) 2011 Free Software Foundation, Inc.                        
14
//
15
// eCos is free software; you can redistribute it and/or modify it under    
16
// the terms of the GNU General Public License as published by the Free     
17
// Software Foundation; either version 2 or (at your option) any later      
18
// version.                                                                 
19
//
20
// eCos is distributed in the hope that it will be useful, but WITHOUT      
21
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
22
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
23
// for more details.                                                        
24
//
25
// You should have received a copy of the GNU General Public License        
26
// along with eCos; if not, write to the Free Software Foundation, Inc.,    
27
// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
28
//
29
// As a special exception, if other files instantiate templates or use      
30
// macros or inline functions from this file, or you compile this file      
31
// and link it with other works to produce a work based on this file,       
32
// this file does not by itself cause the resulting work to be covered by   
33
// the GNU General Public License. However the source code for this file    
34
// must still be made available in accordance with section (3) of the GNU   
35
// General Public License v2.                                               
36
//
37
// This exception does not invalidate any other reasons why a work based    
38
// on this file might be covered by the GNU General Public License.         
39
// -------------------------------------------                              
40
// ####ECOSGPLCOPYRIGHTEND####                                              
41
//=============================================================================
42
//#####DESCRIPTIONBEGIN####
43
//
44
// Author(s):   ilijak
45
// Date:        2011-01-02
46
// Purpose:     LPC1766STK platform specific registers
47
// Description: 
48
// Usage:       #include <cyg/hal/plf_io.h>
49
//
50
//####DESCRIPTIONEND####
51
//
52
//=============================================================================
53
 
54
#include <pkgconf/hal.h>
55
#include <pkgconf/hal_cortexm_lpc17xx_lpc1766stk.h>
56
 
57
#if (CYGHWR_HAL_CORTEXM_LPC17XX_CLOCK_SPEED <= 20000000)
58
#define CYGHWR_HAL_LPC17XX_REG_FLASHTIM CYGHWR_HAL_LPC17XX_REG_FLTSET(CYGHWR_HAL_LPC17XX_REG_FLTIM20MHZ)
59
#elif (CYGHWR_HAL_CORTEXM_LPC17XX_CLOCK_SPEED <= 40000000)
60
#define CYGHWR_HAL_LPC17XX_REG_FLASHTIM CYGHWR_HAL_LPC17XX_REG_FLTSET(CYGHWR_HAL_LPC17XX_REG_FLTIM40MHZ)
61
#elif (CYGHWR_HAL_CORTEXM_LPC17XX_CLOCK_SPEED <= 60000000)
62
#define CYGHWR_HAL_LPC17XX_REG_FLASHTIM CYGHWR_HAL_LPC17XX_REG_FLTSET(CYGHWR_HAL_LPC17XX_REG_FLTIM60MHZ)
63
#elif (CYGHWR_HAL_CORTEXM_LPC17XX_CLOCK_SPEED <= 80000000)
64
#define CYGHWR_HAL_LPC17XX_REG_FLASHTIM CYGHWR_HAL_LPC17XX_REG_FLTSET(CYGHWR_HAL_LPC17XX_REG_FLTIM80MHZ)
65
#elif (CYGHWR_HAL_CORTEXM_LPC17XX_CLOCK_SPEED <= 100000000)
66
#define CYGHWR_HAL_LPC17XX_REG_FLASHTIM CYGHWR_HAL_LPC17XX_REG_FLTSET(CYGHWR_HAL_LPC17XX_REG_FLTIM100MHZ)
67
#elif (CYGHWR_HAL_CORTEXM_LPC17XX_CLOCK_SPEED <= 120000000)
68
#define CYGHWR_HAL_LPC17XX_REG_FLASHTIM CYGHWR_HAL_LPC17XX_REG_FLTSET(CYGHWR_HAL_LPC17XX_REG_FLTIM120MHZ)
69
#else
70
#define CYGHWR_HAL_LPC17XX_REG_FLASHTIM CYGHWR_HAL_LPC17XX_REG_FLTSET(CYGHWR_HAL_LPC17XX_REG_FLTIMSAFE)
71
#endif
72
 
73
 
74
//=============================================================================
75
// Memory access checks.
76
//
77
// Accesses to areas not backed by real devices or memory can cause
78
// the CPU to hang. These macros allow the GDB stubs to avoid making
79
// accidental accesses to these areas.
80
 
81
__externC int cyg_hal_stub_permit_data_access( CYG_ADDRESS addr, cyg_uint32 count );
82
 
83
#define CYG_HAL_STUB_PERMIT_DATA_READ(_addr_, _count_) cyg_hal_stub_permit_data_access( _addr_, _count_ )
84
 
85
#define CYG_HAL_STUB_PERMIT_DATA_WRITE(_addr_, _count_ ) cyg_hal_stub_permit_data_access( _addr_, _count_ )
86
 
87
//=============================================================================
88
 
89
 
90
//-----------------------------------------------------------------------------
91
#endif // CYGONCE_HAL_PLF_IO_H
92
// End of plf_io.h

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.