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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [cortexm/] [lpc17xx/] [var/] [current/] [include/] [hal_cache.h] - Blame information for rev 786

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1 786 skrzyp
#ifndef CYGONCE_HAL_CACHE_H
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#define CYGONCE_HAL_CACHE_H
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//=============================================================================
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//
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//      hal_cache.h
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//
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//      HAL cache control API
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2008 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    jlarmour
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// Contributors: 
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// Date:         2004-07-23
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// Purpose:      Cache control API
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// Description:  The NXP LPC17XX CPU family does not require cache control.
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//               File is kept empty.
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//
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// Usage:
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//               #include <cyg/hal/hal_cache.h>
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//               ...
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//
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//
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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#include <cyg/infra/cyg_type.h>
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//-----------------------------------------------------------------------------
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// Global control of data cache
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// Enable the data cache
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#define HAL_DCACHE_ENABLE()
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// Disable the data cache
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#define HAL_DCACHE_DISABLE()
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// Invalidate the entire cache
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#define HAL_DCACHE_INVALIDATE_ALL()
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// Synchronize the contents of the cache with memory.
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#define HAL_DCACHE_SYNC()
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// Purge contents of data cache
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#define HAL_DCACHE_PURGE_ALL()
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// Query the state of the data cache (does not affect the caching)
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#define HAL_DCACHE_IS_ENABLED(_state_)          \
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    CYG_MACRO_START                             \
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    (_state_) = 0;                              \
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    CYG_MACRO_END
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//-----------------------------------------------------------------------------
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// Global control of Instruction cache
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// Enable the instruction cache
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#define HAL_ICACHE_ENABLE()
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// Disable the instruction cache
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#define HAL_ICACHE_DISABLE()
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// Invalidate the entire cache
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#define HAL_ICACHE_INVALIDATE_ALL()
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// Synchronize the contents of the cache with memory.
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#define HAL_ICACHE_SYNC()
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// Query the state of the instruction cache (does not affect the caching)
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#define HAL_ICACHE_IS_ENABLED(_state_)          \
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    CYG_MACRO_START                             \
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    (_state_) = 0;                              \
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    CYG_MACRO_END
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//-----------------------------------------------------------------------------
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#endif // ifndef CYGONCE_HAL_CACHE_H
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// End of hal_cache.h

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