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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [cortexm/] [lpc17xx/] [var/] [current/] [include/] [lpc17xx_misc.h] - Blame information for rev 786

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1 786 skrzyp
#ifndef CYGONCE_HAL_CORTEXM_LPC17XX_VAR_LPC17XX_MISC_H
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#define CYGONCE_HAL_CORTEXM_LPC17XX_VAR_LPC17XX_MISC_H
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//=============================================================================
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//
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//      lpc17xx_misc.h
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//
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//      HAL misc variant support code for NCP LPC17xx header file
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 2010 Free Software Foundation, Inc.                        
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    andyj 
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// Contributors: jani, ilijak
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// Date:         2010-12-29
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// Purpose:      LPC17XX specific miscellaneous support header file
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// Description: 
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// Usage:        #include <cyg/hal/lpc17xx_misc.h>
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//
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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//-----------------------------------------------------------------------------
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// Function to obtain the current processor clock settings
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// Use PCLK identifiers below
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//
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externC cyg_uint32 hal_lpc_get_pclk(cyg_uint32 pclk_id);
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#define CYG_HAL_CORTEXM_LPC17XX_PCLK(_pclkid_) hal_lpc_get_pclk(_pclkid_)
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//-----------------------------------------------------------------------------
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// Identifiers for peripheral clock. Use these identifiers with the function
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// hal_get_pclk()
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//
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#define CYNUM_HAL_LPC17XX_PCLK_WDT    0
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#define CYNUM_HAL_LPC17XX_PCLK_TIMER0 1
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#define CYNUM_HAL_LPC17XX_PCLK_TIMER1 2
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#define CYNUM_HAL_LPC17XX_PCLK_UART0  3
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#define CYNUM_HAL_LPC17XX_PCLK_UART1  4
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#if 0 // Not implemented on LPC17xx
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# define CYNUM_HAL_LPC17XX_PCLK_PWM0   5
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#endif
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#define CYNUM_HAL_LPC17XX_PCLK_PWM1   6
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#define CYNUM_HAL_LPC17XX_PCLK_I2C0   7
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#define CYNUM_HAL_LPC17XX_PCLK_SPI    8
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#if 0 // Not implemented on LPC17xx
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# define CYNUM_HAL_LPC17XX_PCLK_RTC    9
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#endif
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#define CYNUM_HAL_LPC17XX_PCLK_SSP1   10
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#define CYNUM_HAL_LPC17XX_PCLK_DAC    11
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#define CYNUM_HAL_LPC17XX_PCLK_ADC    12
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#define CYNUM_HAL_LPC17XX_PCLK_CAN1   13
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#define CYNUM_HAL_LPC17XX_PCLK_CAN2   14
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#define CYNUM_HAL_LPC17XX_PCLK_ACF    15
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#define CYNUM_HAL_LPC17XX_PCLK_QEI    16
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#define CYNUM_HAL_LPC17XX_PCLK_GPIO   17
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#define CYNUM_HAL_LPC17XX_PCLK_PCB    18
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#define CYNUM_HAL_LPC17XX_PCLK_I2C1   19
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#if 0 // Not implemented on LPC17xx
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# define CYNUM_HAL_LPC17XX_PCLK_SSP0   21
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#endif
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#define CYNUM_HAL_LPC17XX_PCLK_TIMER2 22
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#define CYNUM_HAL_LPC17XX_PCLK_TIMER3 23
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#define CYNUM_HAL_LPC17XX_PCLK_UART2  24
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#define CYNUM_HAL_LPC17XX_PCLK_UART3  25
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#define CYNUM_HAL_LPC17XX_PCLK_I2C2   26
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#define CYNUM_HAL_LPC17XX_PCLK_I2S    27
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#if 0 // Not implemented on LPC17xx
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# define CYNUM_HAL_LPC17XX_PCLK_MCI    28
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#endif
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#define CYNUM_HAL_LPC17XX_PCLK_RIT    29
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#define CYNUM_HAL_LPC17XX_PCLK_SYSCON 30
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#define CYNUM_HAL_LPC17XX_PCLK_MC     31
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//-----------------------------------------------------------------------------
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// Function to enable/disable power for certain peripheral
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// Use PCONP identifiers from below
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//
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externC void hal_lpc_set_power(cyg_uint8 pconp_id, int on);
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#define CYG_HAL_CORTEXM_LPC17XX_SET_POWER(_pconp_id_, _on_) \
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        hal_lpc_set_power((_pconp_id_), (_on_))
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//-----------------------------------------------------------------------------
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// Identifiers for power control, hal_get_pclk()
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//
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#define CYNUM_HAL_LPC17XX_PCONP_TIMER0 1
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#define CYNUM_HAL_LPC17XX_PCONP_TIMER1 2
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#define CYNUM_HAL_LPC17XX_PCONP_UART0  3
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#define CYNUM_HAL_LPC17XX_PCONP_UART1  4
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#if 0 // Not implemented on LPC17xx
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# define CYNUM_HAL_LPC17XX_PCONP_PWM0   5
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#endif
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#define CYNUM_HAL_LPC17XX_PCONP_PWM1   6
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#define CYNUM_HAL_LPC17XX_PCONP_I2C0   7
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#define CYNUM_HAL_LPC17XX_PCONP_SPI    8
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#define CYNUM_HAL_LPC17XX_PCONP_RTC    9
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#define CYNUM_HAL_LPC17XX_PCONP_SSP1   10
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#if 0 // Not implemented on LPC17xx
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# define CYNUM_HAL_LPC17XX_PCONP_EMC    11
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#endif
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#define CYNUM_HAL_LPC17XX_PCONP_ADC    12
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#define CYNUM_HAL_LPC17XX_PCONP_CAN1   13
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#define CYNUM_HAL_LPC17XX_PCONP_CAN2   14
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#define CYNUM_HAL_LPC17XX_PCONP_GPIO   15
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#define CYNUM_HAL_LPC17XX_PCONP_RIT    16
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#define CYNUM_HAL_LPC17XX_PCONP_MCPWM  17
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#define CYNUM_HAL_LPC17XX_PCONP_QEI    18
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#define CYNUM_HAL_LPC17XX_PCONP_I2C1   19
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#if 0 // Not implemented on LPC17xx
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# define CYNUM_HAL_LPC17XX_PCONP_LCD    20
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#endif
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#define CYNUM_HAL_LPC17XX_PCONP_SSP0   21
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#define CYNUM_HAL_LPC17XX_PCONP_TIMER2 22
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#define CYNUM_HAL_LPC17XX_PCONP_TIMER3 23
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#define CYNUM_HAL_LPC17XX_PCONP_UART2  24
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#define CYNUM_HAL_LPC17XX_PCONP_UART3  25
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#define CYNUM_HAL_LPC17XX_PCONP_I2C2   26
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#define CYNUM_HAL_LPC17XX_PCONP_I2S    27
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#if 0 // Not implemented on LPC17xx
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# define CYNUM_HAL_LPC17XX_PCONP_SDC    28
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#endif
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#define CYNUM_HAL_LPC17XX_PCONP_GPDMA  29
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#define CYNUM_HAL_LPC17XX_PCONP_ENET   30
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#define CYNUM_HAL_LPC17XX_PCONP_USB    31
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//-----------------------------------------------------------------------------
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// Configure pin function
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//
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externC void hal_lpc_set_pin_function(cyg_uint8 port, cyg_uint8 pin,
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                                  cyg_uint8 function);
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#define CYG_HAL_CORTEXM_LPC17XX_PIN_CFG(_port_, _pin_, _func_) \
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                hal_lpc_set_pin_function((_port_), (_pin_), (_func_))
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//-----------------------------------------------------------------------------
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// Macros to derive the baudrate divider values for the internal UARTs
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// The LPC17xx family supports different baudrate clocks for each single
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// UART. So we need a way to calculate the baudrate for each single UART
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// Now we rely on the fact that we use the same baudrate clock for all
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// UARTs and we query only UART0
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//-----------------------------------------------------------------------------
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#define CYG_HAL_CORTEXM_LPC17XX_BAUD_GENERATOR(_pclkid_, baud) \
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                (CYG_HAL_CORTEXM_LPC17XX_PCLK(_pclkid_)/((baud)*16))
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//-----------------------------------------------------------------------------
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// LPC17XX platform reset (watchdog resets the board)
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//-----------------------------------------------------------------------------
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#if 0
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externC void hal_lpc_watchdog_reset(void);
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#define HAL_PLATFORM_RESET() hal_lpc_watchdog_reset()
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#define HAL_PLATFORM_RESET_ENTRY 0
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#endif
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//-----------------------------------------------------------------------------
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// Compatibility layer for LPC2xxx device drivers
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//-----------------------------------------------------------------------------
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#define CYNUM_HAL_LPC24XX_PCLK_UART0 CYNUM_HAL_LPC17XX_PCLK_UART0
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#define CYNUM_HAL_LPC24XX_PCLK_UART1 CYNUM_HAL_LPC17XX_PCLK_UART1
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#define CYNUM_HAL_LPC24XX_PCLK_UART2 CYNUM_HAL_LPC17XX_PCLK_UART2
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#define CYNUM_HAL_LPC24XX_PCLK_UART3 CYNUM_HAL_LPC17XX_PCLK_UART3
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#define CYG_HAL_ARM_LPC24XX_BAUD_GENERATOR(_pclkid_, baud) \
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            CYG_HAL_CORTEXM_LPC17XX_BAUD_GENERATOR(_pclkid_, baud)
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//-----------------------------------------------------------------------------
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#endif // CYGONCE_HAL_CORTEXM_LPC17XX_VAR_LPC17XX_MISC_H
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// End of lpc17xx_misc.h

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