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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [cortexm/] [lpc17xx/] [var/] [current/] [include/] [var_intr.h] - Blame information for rev 786

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1 786 skrzyp
#ifndef CYGONCE_HAL_VAR_INTR_H
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#define CYGONCE_HAL_VAR_INTR_H
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//==========================================================================
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//
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//      var_intr.h
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//
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//      HAL Interrupt and clock assignments for LPC17XX variants
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//
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//==========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 2010, 2011 Free Software Foundation, Inc.                        
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):     ilijak
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// Date:          2010-12-29
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// Purpose:       Define Interrupt support
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// Description:   The interrupt specifics for NXP LPC17XX variants are
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//                defined here.
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//              
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// Usage:         #include <cyg/hal/var_intr.h>
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//                However applications should include using <cyg/hal/hal_intr.h>
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//                instead to allow for platform overrides.
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#include <cyg/hal/plf_intr.h>
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//==========================================================================
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#define CYGNUM_HAL_INTERRUPT_WD      (0+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_TIMER0  (1+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_TIMER1  (2+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_TIMER2  (3+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_TIMER3  (4+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_UART0   (5+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_UART1   (6+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_UART2   (7+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_UART3   (8+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_PWM1    (9+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_I2C0    (10+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_I2C1    (11+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_I2C2    (12+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_SPI     (13+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_SSP0    (14+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_SSP1    (15+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_PLL0    (16+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_RTCDEV  (17+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_EINT0   (18+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_EINT1   (19+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_EINT2   (20+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_EINT3   (21+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_AD      (22+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_BOD     (23+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_USB     (24+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_CAN     (25+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_DMA     (26+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_I2S     (27+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_ETH     (28+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_RITINT  (29+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_MCPWM   (30+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_QENC    (31+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_PLL1    (32+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_USBAI   (33+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_CANWAKE (34+CYGNUM_HAL_INTERRUPT_EXTERNAL)
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#define CYGNUM_HAL_INTERRUPT_NVIC_MAX (CYGNUM_HAL_INTERRUPT_CANWAKE)
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#define CYGNUM_HAL_ISR_MIN            0
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#define CYGNUM_HAL_ISR_MAX            CYGNUM_HAL_INTERRUPT_CANWAKE
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#define CYGNUM_HAL_ISR_COUNT          (CYGNUM_HAL_ISR_MAX+1)
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#define CYGNUM_HAL_VSR_MIN            0
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#ifndef CYGNUM_HAL_VSR_MAX
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# define CYGNUM_HAL_VSR_MAX (CYGNUM_HAL_VECTOR_SYS_TICK+CYGNUM_HAL_INTERRUPT_NVIC_MAX)
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#endif
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#define CYGNUM_HAL_VSR_COUNT          (CYGNUM_HAL_VSR_MAX+1)
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//==========================================================================
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// Interrupt mask and config for variant-specific devices
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//----------------------------------------------------------------------------
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#endif // CYGONCE_HAL_VAR_INTR_H
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// EOF var_intr.h

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