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#ifndef CYGONCE_HAL_CACHE_H

#define CYGONCE_HAL_CACHE_H

//=============================================================================

//

//      hal_cache.h

//

//      HAL cache control API

//

//=============================================================================

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// for more details.                                                        

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//

// As a special exception, if other files instantiate templates or use      

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//=============================================================================

//#####DESCRIPTIONBEGIN####

//

// Author(s):   larsi

// Contributors:

// Date:        2008-07-09

// Purpose:     Cache control API

// Description: The macros defined here provide the HAL APIs for handling

//              cache control operations.

// Usage:       #include <cyg/hal/hal_cache.h>

//

//####DESCRIPTIONEND####

//

//=============================================================================

#include <pkgconf/hal.h>

#include <cyg/infra/cyg_type.h>

#include <cyg/hal/var_cache.h>

//-----------------------------------------------------------------------------

// Cache dimensions

// FR30 only has an instruction cache, so data cache macros are empty

#ifndef HAL_DCACHE_SIZES_DEFINED

#define HAL_DCACHE_SIZE                 0       // Size of cache in bytes

#define HAL_DCACHE_LINE_SIZE            16      // Size of a cache line

#define HAL_DCACHE_WAYS                 2       // Associativity of the cache

#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS))

#endif

#ifndef HAL_ICACHE_SIZES_DEFINED

#define HAL_ICACHE_SIZE                 4096    // Size of cache in bytes

#define HAL_ICACHE_LINE_SIZE            16      // Size of a cache line

#define HAL_ICACHE_WAYS                 2       // Associativity of the cache

#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS))

#endif

//-----------------------------------------------------------------------------

// Global control of the data cache

// FR30 only has an instruction cache, so data cache macros are empty

// Enable the cache

#ifndef HAL_DCACHE_ENABLE_DEFINED

#define HAL_DCACHE_ENABLE()

#endif

// Disable the cache

#ifndef HAL_DCACHE_DISABLE_DEFINED

#define HAL_DCACHE_DISABLE()

#endif

// Query the state of the cache

#ifndef HAL_DCACHE_IS_ENABLED_DEFINED

#define HAL_DCACHE_IS_ENABLED(_state_) \

CYG_MACRO_START                        \

_state_ = 1;                           \

CYG_MACRO_END

#endif

// Invalidate the entire cache

#ifndef HAL_DCACHE_INVALIDATE_ALL_DEFINED

#define HAL_DCACHE_INVALIDATE_ALL()

#endif

// Synchronize the contents of the cache to the memory

#ifndef HAL_DCACHE_SYNC_DEFINED

#define HAL_DCACHE_SYNC()

#endif

// Locks entry in the cache

#ifndef HAL_DCACHE_LOCK_DEFINED

#define HAL_DCACHE_LOCK(_base_, _size_)

#endif

// Unlocks entry in the cache

#ifndef HAL_DCACHE_UNLOCK_DEFINED

#define HAL_DCACHE_UNLOCK(_base_, _size_)

#endif

// Unlocks the whole cache.

#ifndef HAL_DCACHE_UNLOCK_ALL_DEFINED

#define HAL_DCACHE_UNLOCK_ALL()

#endif

//-----------------------------------------------------------------------------

// Global control of the instruction cache

// Enable the cache

#ifndef HAL_ICACHE_ENABLE_DEFINED

#define HAL_ICACHE_ENABLE()

#endif

// Disable the cache

#ifndef HAL_ICACHE_DISABLE_DEFINED

#define HAL_ICACHE_DISABLE()

#endif

// Query the state of the cache

#ifndef HAL_ICACHE_IS_ENABLED_DEFINED

#define HAL_ICACHE_IS_ENABLED(_state_) \

CYG_MACRO_START                        \

_state_ = 1;                           \

CYG_MACRO_END

#endif

// Invalidate the entire cache

#ifndef HAL_ICACHE_INVALIDATE_ALL_DEFINED

#define HAL_ICACHE_INVALIDATE_ALL()

#endif

// Synchronize the contents of the cache to the memory.

#ifndef HAL_ICACHE_SYNC_DEFINED

#define HAL_ICACHE_SYNC()

#endif

// Locks entry in the cache, fr30 architecture does not support locking specifc

// regions, so _base_ and _size are ignored and the whole cache is locked.

// During cache lock only valid entries are locked. Invalid entries are updated.

#ifndef HAL_ICACHE_LOCK_DEFINED

#define HAL_ICACHE_LOCK(_base_, _size_)

#endif

// Unlocks entry in the cache. fr30 architecture does not support locking specifc

// regions, so _base_ and _size are ignored and the whole cache is unlocked.

#ifndef HAL_ICACHE_UNLOCK_DEFINED

#define HAL_ICACHE_UNLOCK(_base_, _size_)

#endif

// Unlocks the whole cache.

#ifndef HAL_ICACHE_UNLOCK_ALL_DEFINED

#define HAL_ICACHE_UNLOCK_ALL()

#endif

//-----------------------------------------------------------------------------

#endif // ifndef CYGONCE_HAL_CACHE_H

// End of hal_cache.h