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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [frv/] [mb93093/] [current/] [include/] [plf_ints.h] - Blame information for rev 853

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1 786 skrzyp
#ifndef CYGONCE_PLF_INTS_H
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#define CYGONCE_PLF_INTS_H
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//==========================================================================
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//
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//      plf_ints.h
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//
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//      HAL extended support for platform specific interrupts
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//
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//==========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    gthomas
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// Contributors: gthomas
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// Date:         2001-02-24
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// Purpose:      Define Interrupt support
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// Description:  The interrupt details for the MB93091 (FRV400) are defined here.
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// Usage:
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//               #include <cyg/hal/plf_ints.h>
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//               ...
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//              
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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// Define here extended support for this particular platform
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// Interrupts are mapped onto "channels" by the interrupt controller
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// The channel in turn is presented to the CPU as a "level" which can
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// be masked.  The eCos interrupt names below are for the default mapping
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// of interrupt sources to channels.
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#include <cyg/hal/fr400.h>
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#include <cyg/hal/fr-v.h>
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#define CYGNUM_HAL_INTERRUPT_TIMER0 CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_14
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#define CYGNUM_HAL_INTERRUPT_TIMER1 CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_13
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#define CYGNUM_HAL_INTERRUPT_TIMER2 CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_12
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#define CYGNUM_HAL_INTERRUPT_DMA0   CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_11
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#define CYGNUM_HAL_INTERRUPT_DMA1   CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_10
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#define CYGNUM_HAL_INTERRUPT_DMA2   CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_9
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#define CYGNUM_HAL_INTERRUPT_DMA3   CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_8
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#define CYGNUM_HAL_INTERRUPT_UART0  CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_2
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#define CYGNUM_HAL_INTERRUPT_UART1  CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_1
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#define CYGNUM_HAL_INTERRUPT_EXT0   CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_7
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#define CYGNUM_HAL_INTERRUPT_EXT1   CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_6
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#define CYGNUM_HAL_INTERRUPT_EXT2   CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_5
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#define CYGNUM_HAL_INTERRUPT_EXT7   CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_4
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#define CYGNUM_HAL_INTERRUPT_RTC     CYGNUM_HAL_INTERRUPT_TIMER1
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#define CYGNUM_HAL_INTERRUPT_SERIALA CYGNUM_HAL_INTERRUPT_UART0
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#define CYGNUM_HAL_INTERRUPT_SERIALB CYGNUM_HAL_INTERRUPT_UART1
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#define CYGNUM_HAL_INTERRUPT_LAN     CYGNUM_HAL_INTERRUPT_EXT7
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//----------------------------------------------------------------------------
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// Reset.
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#define HAL_PLATFORM_RESET()                                               \
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    CYG_MACRO_START                                                        \
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    cyg_uint32 ctrl;                                                    \
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                                                                           \
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    /* By disabling interupts we will just hang in the loop below      */  \
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    /* if for some reason the software reset fails.                    */  \
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    HAL_DISABLE_INTERRUPTS(ctrl);                                          \
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                                                                          \
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    /* Software reset. */                                                  \
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    asm volatile("      membar !" \
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                 "      sti     %1,@(%0,0) !" \
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                 "      nop ! nop ! nop ! nop ! nop ! " \
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                 "      nop ! nop ! nop ! nop ! nop ! " \
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                 "      nop ! nop ! nop ! nop ! nop ! " \
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                 "      nop ! nop ! nop ! nop ! nop ! " \
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                 : : "r" (_FRV400_HW_RESET), "r" (1)    \
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                  );                                                    \
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                                                                           \
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    for(;;); /* hang here forever if reset fails */                        \
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    CYG_MACRO_END
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#define HAL_PLATFORM_RESET_ENTRY 0xFF000000
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#endif // CYGONCE_PLF_INTS_H

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