OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [h8300/] [arch/] [current/] [src/] [hal_misc.c] - Blame information for rev 786

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 786 skrzyp
/*==========================================================================
2
//
3
//      hal_misc.c
4
//
5
//      HAL miscellaneous functions
6
//
7
//==========================================================================
8
// ####ECOSGPLCOPYRIGHTBEGIN####
9
// -------------------------------------------
10
// This file is part of eCos, the Embedded Configurable Operating System.
11
// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2005 Free Software Foundation, Inc.
12
//
13
// eCos is free software; you can redistribute it and/or modify it under
14
// the terms of the GNU General Public License as published by the Free
15
// Software Foundation; either version 2 or (at your option) any later
16
// version.
17
//
18
// eCos is distributed in the hope that it will be useful, but WITHOUT
19
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
20
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
21
// for more details.
22
//
23
// You should have received a copy of the GNU General Public License
24
// along with eCos; if not, write to the Free Software Foundation, Inc.,
25
// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
26
//
27
// As a special exception, if other files instantiate templates or use
28
// macros or inline functions from this file, or you compile this file
29
// and link it with other works to produce a work based on this file,
30
// this file does not by itself cause the resulting work to be covered by
31
// the GNU General Public License. However the source code for this file
32
// must still be made available in accordance with section (3) of the GNU
33
// General Public License v2.
34
//
35
// This exception does not invalidate any other reasons why a work based
36
// on this file might be covered by the GNU General Public License.
37
// -------------------------------------------
38
// ####ECOSGPLCOPYRIGHTEND####
39
//==========================================================================
40
//#####DESCRIPTIONBEGIN####
41
//
42
// Author(s):    nickg
43
// Contributors: nickg, jlarmour
44
// Date:         1999-02-18
45
// Purpose:      HAL miscellaneous functions
46
// Description:  This file contains miscellaneous functions provided by the
47
//               HAL.
48
//
49
//####DESCRIPTIONEND####
50
//
51
//========================================================================*/
52
 
53
#include <pkgconf/hal.h>
54
 
55
#include <cyg/infra/cyg_type.h>
56
#include <cyg/infra/cyg_trac.h>
57
 
58
#include <cyg/hal/hal_arch.h>
59
 
60
#include <cyg/hal/hal_intr.h>
61
 
62
#if 0
63
void trace( CYG_ADDRWORD tag, CYG_ADDRWORD a1, CYG_ADDRWORD a2)
64
{
65
    CYG_ADDRWORD **pp = (CYG_ADDRWORD **)0x48100000;
66
    CYG_ADDRWORD *ix = (CYG_ADDRWORD *)0x4810000C;
67
    CYG_ADDRWORD *p = *pp;
68
    *p++ = tag;
69
    *ix = *ix + 1;
70
    *p++ = *ix;
71
    *p++ = a1;
72
    *p++ = a2;
73
    *pp = p;
74
}
75
#endif
76
 
77
/*------------------------------------------------------------------------*/
78
 
79
#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG
80
cyg_bool cyg_hal_stop_constructors;
81
#endif
82
 
83
void
84
cyg_hal_invoke_constructors(void)
85
{
86
    typedef void (*pfunc) (void);
87
    extern pfunc __CTOR_LIST__[];
88
    extern pfunc __CTOR_END__[];
89
 
90
#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG
91
    static pfunc *p = &__CTOR_END__[-1];
92
 
93
    cyg_hal_stop_constructors = 0;
94
    for (; p >= __CTOR_LIST__; p--) {
95
        (*p) ();
96
        if (cyg_hal_stop_constructors) {
97
            p--;
98
            break;
99
        }
100
    }
101
#else
102
    pfunc *p;
103
 
104
    for (p = &__CTOR_END__[-1]; p >= __CTOR_LIST__; p--)
105
        (*p) ();
106
#endif
107
 
108
} // cyg_hal_invoke_constructors()
109
 
110
/*------------------------------------------------------------------------*/
111
// Default ISR
112
externC cyg_uint32
113
hal_arch_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data)
114
{
115
    return 0;
116
}
117
 
118
//--------------------------------------------------------------------------
119
/* Determine the index of the ls bit of the supplied mask.                */
120
 
121
cyg_uint32
122
hal_lsbit_index(cyg_uint32 mask)
123
{
124
    int bit = -1;
125
 
126
    if (mask == 0)
127
        return -1;
128
 
129
    if ((mask & 0xffff) == 0) {
130
        mask >>= 16;
131
        bit += 16;
132
    }
133
    if ((mask & 0xff) == 0) {
134
        mask >>= 8;
135
        bit += 8;
136
    }
137
 
138
    __asm__("1:\n\t"
139
            "adds #1,%0\n\t"
140
            "shlr.b %w2\n\t"
141
            "bcc 1b\n\t"
142
            :"=r"(bit):"0"(bit),"r"(mask));
143
 
144
    return bit;
145
}
146
 
147
/*------------------------------------------------------------------------*/
148
/* Determine the index of the ms bit of the supplied mask.                */
149
 
150
cyg_uint32
151
hal_msbit_index(cyg_uint32 mask)
152
{
153
    unsigned int bit = 8;
154
 
155
    if (mask == 0)
156
        return -1;
157
 
158
    if ((mask & ~0xffff) != 0)
159
        mask >>= 16;
160
    else
161
        bit += 16;
162
 
163
    if ((mask & 0xff00) != 0)
164
        mask >>= 8;
165
    else
166
        bit += 8;
167
 
168
    __asm__("1:\n\t"
169
            "dec.b %w0\n\t"
170
            "shll.b %w2\n\t"
171
            "bcc 1b\n\t"
172
            :"=r"(bit):"0"(bit),"r"(mask));
173
 
174
    return bit;
175
}
176
 
177
/*------------------------------------------------------------------------*/
178
/* First level C exception handler.                                       */
179
 
180
externC void __handle_exception (void);
181
 
182
externC HAL_SavedRegisters *_hal_registers;
183
 
184
void
185
cyg_hal_exception_handler(HAL_SavedRegisters *regs,CYG_WORD vector)
186
{
187
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
188
 
189
    // Set the pointer to the registers of the current exception
190
    // context. At entry the GDB stub will expand the
191
    // HAL_SavedRegisters structure into a (bigger) register array.
192
    _hal_registers = regs;
193
 
194
    __handle_exception();
195
 
196
#endif
197
#if defined(CYGPKG_HAL_EXCEPTIONS)
198
 
199
    // We should decode the vector and pass a more appropriate
200
    // value as the second argument. For now we simply pass a
201
    // pointer to the saved registers. We should also divert
202
    // breakpoint and other debug vectors into the debug stubs.
203
 
204
    cyg_hal_deliver_exception( vector, (CYG_ADDRWORD)regs );
205
 
206
#endif
207
 
208
    return;
209
}
210
 
211
/*------------------------------------------------------------------------*/
212
/* default ISR                                                            */
213
 
214
#ifndef CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT
215
externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data)
216
{
217
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) && \
218
    defined(CYGHWR_HAL_GDB_PORT_VECTOR) &&         \
219
    defined(HAL_CTRLC_ISR)
220
 
221
#ifndef CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN    
222
    if( vector == CYGHWR_HAL_GDB_PORT_VECTOR )
223
#endif        
224
    {
225
        cyg_uint32 result = HAL_CTRLC_ISR( vector, data );
226
        if( result != 0 ) return result;
227
    }
228
 
229
#endif
230
 
231
    CYG_TRACE1(true, "Interrupt: %d", vector);
232
    CYG_FAIL("Spurious Interrupt!!!");
233
    return 0;
234
}
235
#endif
236
 
237
/*------------------------------------------------------------------------*/
238
/* Idle thread activity.                                                  */
239
 
240
externC void hal_idle_thread_action(cyg_uint32 loop_count)
241
{
242
}
243
 
244
/*------------------------------------------------------------------------*/
245
/* End of hal_misc.c                                                      */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.