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##=============================================================================
##
##      vectors.S
##
##      H8/300 exception vectors
##
##=============================================================================
## ####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later
## version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT
## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License
## along with eCos; if not, write to the Free Software Foundation, Inc.,
## 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
##
## As a special exception, if other files instantiate templates or use
## macros or inline functions from this file, or you compile this file
## and link it with other works to produce a work based on this file,
## this file does not by itself cause the resulting work to be covered by
## the GNU General Public License. However the source code for this file
## must still be made available in accordance with section (3) of the GNU
## General Public License v2.
##
## This exception does not invalidate any other reasons why a work based
## on this file might be covered by the GNU General Public License.
## -------------------------------------------
## ####ECOSGPLCOPYRIGHTEND####
##=============================================================================
#######DESCRIPTIONBEGIN####
##
## Author(s):   Yoshinori Sato
## Contributors: Yoshinori Sato
## Date:        2002-02-14
## Purpose:     H8/300 exception vectors
## Description: This file defines the code placed into the exception
##              vectors. It also contains the first level default VSRs
##              that save and restore state for both exceptions and
##              interrupts.
##
######DESCRIPTIONEND####
##
##=============================================================================
 
#include 
 
#ifdef CYGPKG_REDBOOT
#include 
#endif
 
#ifdef CYGPKG_KERNEL
 
#include 
 
#endif
 
#include 
#include 
#include 
 
 
##-----------------------------------------------------------------------------
 
#ifdef CYGPKG_HAL_H8300_H8300H
        .h8300h
        .macro  shll2 reg
        shll.l  \reg
        shll.l  \reg
        .endm
        .macro  shlr2 reg
        shlr.l  \reg
        shlr.l  \reg
        .endm
#endif
#ifdef CYGPKG_HAL_H8300_H8S
        .h8300s
        .macro  shll2 reg
        shll.l  #2,\reg
        .endm
        .macro  shlr2 reg
        shlr.l  #2,\reg
        .endm
#endif
 
#ifdef CYGPKG_CYGMON
##-----------------------------------------------------------------------------
## Macros for Stack handling when running Cygmon
 
.macro hal_cygmon_switch_app_stack
#ifdef CYGPKG_HAL_H8300_H8300H
        ; Switch to interrupt stack to handle exception
 
        ; First, save some scratch registers
        mov.l   er0,@-sp
        mov.l   er1,@-sp
 
        ; Copy the exception frame
        mov.l   #__cygmon_interrupt_stack,er0
        mov.l   @(8:16,sp),er1
        mov.l   er1,@-er0
 
        ; Save the pre-exception sp in the register image
        mov.l   sp,@-er0
 
        ; Actually switch the stack
        mov.l   er0,sp
 
        mov.l   @sp,er0
        adds    #4,er0
        adds    #4,er0
        mov.l   er0,@sp
 
        ; Now, restore the scratch registers
        mov.l   @(-4:16,er0),er1
        mov.l   @(-8:16,er0),er0
#endif
#ifdef CYGPKG_HAL_H8300_H8S
        ; Switch to interrupt stack to handle exception
 
        ; First, save some scratch registers
        stm.l   er0-er1,@-sp
 
        ; Copy the exception frame
        mov.l   #__cygmon_interrupt_stack,er0
        mov.l   @(10,sp:16),er1
        mov.l   er1,@-er0
        mov.w   @(10,sp:16),r1
        mov.w   r1,@-er0
 
        ; Save the pre-exception sp in the register image
        mov.l   sp,@-er0
 
        ; Actually switch the stack
        mov.l   er0,sp
 
        mov.l   @sp,er0
        adds    #4,er0
        adds    #4,er0
        mov.l   er0,@sp
 
        ; Now, restore the scratch registers
        mov.l   @(-4:16,er0),er1
        mov.l   @(-8:16,er0),er0
#endif
.endm
 
.macro hal_cygmon_restore_app_stack
        // For cygmon we are switching stacks immediately on exception.
        // We must wait until the very end before restoring the original stack.
 
#ifdef CYGPKG_HAL_H8300_H8300H
        ; Save some scratch registers
        subs    #4,sp
        mov.l   er0,@-sp
        mov.l   er1,@-sp
 
        ; We need to restore the application stack pointer, but we also
        ; need to restore the exception frame.
        mov.l   @(12:16,sp),er0
        mov.l   @(16:16,sp),er1
        mov.l   er1,@er0
        mov.l   er0,@(8:16,sp)
 
        ; Restore the scratch registers
        mov.l   @sp+,er1
        mov.l   @sp+,er0
        mov.l   @sp+,sp                 // Restore the frame-adjusted SP
#endif
#ifdef CYGPKG_HAL_H8300_H8S
        ; Save some scratch registers
        subs    #4,sp
        stm.l   er0-er1,@-sp
 
        ; We need to restore the application stack pointer, but we also
        ; need to restore the exception frame.
        mov.l   @(12:16,sp),er0
        mov.w   @(16:16,sp),r1
        mov.w   r1,@er0
        mov.l   @(18:16,sp),er1
        mov.l   er1,@er0
        mov.l   er0,@(8:16,sp)
 
        ; Restore the scratch registers
        ldm.l   @sp+,er0-er1
        mov.l   @sp+,sp                 // Restore the frame-adjusted SP
#endif
.endm
 
#endif // CYGPKG_CYGMON
 
##-----------------------------------------------------------------------------
 
#if (defined(CYG_HAL_STARTUP_ROM) || \
     defined(CYGPKG_HAL_H8300_H8300H_SIM) || \
     defined(CYGPKG_HAL_H8300_H8S_SIM))
 
        .section .vectors,"a"
 
        .globl  reset_vector
 
reset_vector:
        .long   CYG_LABEL_DEFN(_start)
        .long   CYG_LABEL_DEFN(_start)
vector  =       2
        .rept   CYG_ISR_TABLE_SIZE-2
        .long   interrupt_redirect_table+vector*4
vector  =       vector + 1
        .endr
#endif
 
#if !defined(CYGSEM_HAL_H8300_VECTOR_HOOK)
        .section .int_hook_table,"ax"
interrupt_redirect_table:
vector  =       0
        .rept   CYG_ISR_TABLE_SIZE
        jsr     @interrupt_entry
vector  =       vector + 1
        .endr
#else
        .section .int_hook_table,"x"
interrupt_redirect_table:
        .space  4*CYG_ISR_TABLE_SIZE
#endif
 
##-----------------------------------------------------------------------------
## Startup code
 
        .text
 
        .globl  CYG_LABEL_DEFN(_start)
CYG_LABEL_DEFN(_start):
        ; set up stack
 
        mov.l   #__interrupt_stack,sp
 
        ; Initialize hardware
        hal_cpu_init
        hal_mmu_init
        hal_memc_init
        hal_diag_init
        hal_intc_init
        hal_cache_init
        hal_timer_init
        hal_mon_init
 
#ifdef CYG_HAL_STARTUP_ROM
 
        ; Copy data from ROM to RAM
 
        mov.l   #CYG_LABEL_DEFN(__rom_data_start),er5
        mov.l   #CYG_LABEL_DEFN(__ram_data_start),er6
        mov.l   #CYG_LABEL_DEFN(__ram_data_end),er4
        sub.l   er6,er4
        shlr2   er4
1:
        mov.l   @er5+,er0
        mov.l   er0,@er6
        adds    #4,er6
        dec.l   #1,er4
        bne     1b
 
#endif
 
#if defined(CYGSEM_HAL_H8300_VECTOR_HOOK)
        ; Setup Interrupt Vector (virtual)
 
        ;; check rom table
        mov.l   #8*4,er0
        mov.l   @er0+,er1
        adds    #4,er1
        mov.b   #3,r3l
1:
        mov.l   @er0+,er2
        cmp.l   er1,er2
        bne     3f
        adds    #4,er1
        dec.b   r3l
        bne     1b
        ;; calculate vector address
        mov.l   @8*4,er0
        and.w   #0xff,e0
        sub.l   #8*4,er0
        ;; build ram vector
        mov.l   er0,@__interrupt_table
        mov.l   #0x5e000000+interrupt_entry,er1
        mov.l   #save_vector_table,er3
        mov.b   #0,r2l
2:
        ;; check saved vector
        mov.b   @er3+,r2h
        cmp.b   r2l,r2h
        beq     5f
        subs    #1,er3
        mov.l   er1,@er0
5:
        adds    #4,er0
        inc.b   r2l
        cmp.b   #CYG_ISR_TABLE_SIZE,r2l
        bcs     2b
        bra     4f
3:
        bra     3b
4:
 
#else
        mov.l   #interrupt_redirect_table,er0
        mov.l   er0,@__interrupt_table
#endif
 
        ; Clear BSS
        mov.l   #CYG_LABEL_DEFN(__bss_start),er5
        mov.l   #CYG_LABEL_DEFN(__bss_end),er4
        sub.l   #CYG_LABEL_DEFN(__bss_start),er4
        shlr2   er4
        sub.l   er0,er0
1:
        mov.l   er0,@er5
        adds    #4,er5
        dec.l   #1,er4
        bne     1b
 
        ; Call variant and platform HAL
        ; initialization routines.
 
        .extern CYG_LABEL_DEFN(hal_variant_init)
        jsr     @CYG_LABEL_DEFN(hal_variant_init)
 
        .extern CYG_LABEL_DEFN(hal_platform_init)
        jsr     @CYG_LABEL_DEFN(hal_platform_init)
 
        ; Call constructors
 
        .extern CYG_LABEL_DEFN(cyg_hal_invoke_constructors)
        jsr     @CYG_LABEL_DEFN(cyg_hal_invoke_constructors)
 
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
        .extern CYG_LABEL_DEFN(initialize_stub)
        jsr     @CYG_LABEL_DEFN(initialize_stub)
#endif
 
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \
    || defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
        .extern CYG_LABEL_DEFN(hal_ctrlc_isr_init)
        jsr     @CYG_LABEL_DEFN(hal_ctrlc_isr_init)
#endif
 
 
        ; Call cyg_start
        sub.l   er0,er0
 
        .extern CYG_LABEL_DEFN(cyg_start)
        jsr     @CYG_LABEL_DEFN(cyg_start)
 
9:
        bra     9b              ; Loop if we return
 
save_vector_table:
#if defined(CYGSEM_HAL_H8300_SAVE_STUB_VECTOR)
        .byte   5,11
#if defined(CYGPKG_HAL_H8300_SAVED_VECTORS)
        h8300_save_vectors
#endif
#endif
        .byte   0                ; end maker
        .align  2
 
interrupt_entry:
        mov.l   er0,@-sp
        mov.l   @(4:16,sp),er0  ; interrupt vector offset
        mov.l   er1,@-sp
        mov.l   @__interrupt_table,er1
        sub.l   er1,er0
        shlr2   er0
        dec.l   #1,er0
        mov.l   er0,@CYG_LABEL_DEFN(_intvector)
        mov.l   @sp+,er1
        mov.l   @sp+,er0
        adds    #4,sp
#ifdef CYGPKG_CYGMON
        hal_cygmon_switch_app_stack
#endif
        hal_cpu_save_all
        h8300_var_interrupt_entry               ; load isr address
        jmp     @er0
 
##-----------------------------------------------------------------------------
## The following macros are defined depending on whether the HAL is configured
## to support the kernel or not.
 
#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
 
        .extern CYG_LABEL_DEFN(cyg_scheduler_sched_lock)
 
        ; Increment the scheduler lock
 
        .macro increment_sched_lock reg=er0
        mov.l   @CYG_LABEL_DEFN(cyg_scheduler_sched_lock),\reg
        inc.l   #1,\reg
        mov.l   \reg,@CYG_LABEL_DEFN(cyg_scheduler_sched_lock)
        .endm
 
#else
 
        .macro increment_sched_lock reg=er0
        .endm
 
#endif
 
##-----------------------------------------------------------------------------
## Default interrupt VSR
 
        .text
        .globl  CYG_LABEL_DEFN(__default_interrupt_vsr)
CYG_LABEL_DEFN(__default_interrupt_vsr):
 
        ; We come here with all the registers pushed
        ; onto the stack.
 
        hal_diag_intr_start
 
        increment_sched_lock
 
#if defined(CYGPKG_CYGMON)
        // For Cygmon, we saved this back when we originally switched stacks.
        mov.l   sp,er1                          ; A2 = saved thread state
#elif defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK)
        ; Increment interrupt nesting counter
        mov.l   sp,er1
        mov.l   #__interrupt_stack,er0          ; A0 = interrupt stack top
        cmp.l   #__interrupt_stack_base,sp      ; compare with base of stack
        blt     1f                              ; if lt switch to int stack
        cmp.l   er0,sp                          ; compare sp with stack top
        ble     8f                              ; if le already on istack
1:
        mov.l   er0,sp                          ; switch to new SP
8:
        mov.l   er1,@-sp                        ; save old SP
 
#else
        mov     sp,er1                          ; A2 = saved thread state
#endif
        mov.l   er1,er4
 
        ; Here D3 contains the table byte offset of the vector to
        ; call.
 
#if defined(CYGPKG_KERNEL_INSTRUMENT) && defined(CYGDBG_KERNEL_INSTRUMENT_INTR)
 
        ; Call cyg_instrument to record that this interrupt is being raised.
 
        .extern CYG_LABEL_DEFN(cyg_instrument)
        mov.l   #0x0301,er0                     ; type = INTR,RAISE
        mov.l   @CYG_LABEL_DEFN(_intvector),er2         ; arg2 = table offset
        jsr     CYG_LABEL_DEFN(cyg_instrument)  ; call instrumentation
 
#endif
 
#ifdef CYGSEM_HAL_COMMON_INTERRUPTS_ALLOW_NESTING
 
        ; To allow nested interrupts, we set the IE bit. We do
        ; not touch the IPL bits, so only higher priority interrupts
        ; will be nested on top of us. Also, new interrupts will not
        ; be delivered until the ISR calls
        ; Cyg_Interrupt::acknowledge_interrupt(). At some future point
        ; we may want to do the ack stuff here to allow immediate nesting.
 
        mov.l   @CYG_LABEL_DEFN(_intvector),er0
        mov.b   @(CYG_LABEL_DEFN(cyg_hal_level_table),er0),r0l
        hal_cpu_set_int_level
#endif
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) || \
    defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
 
        ; If we have Ctrl-C support enabled, save a pointer to the
        ; saved CPU state here so we can plant a breakpoint there if
        ; this is a ^C.
 
        .extern CYG_LABEL_DEFN(hal_saved_interrupt_state)
        mov.l   er4,@CYG_LABEL_DEFN(hal_saved_interrupt_state)
 
#endif
        mov.l   @CYG_LABEL_DEFN(_intvector),er0
        shll2   er0
        mov.l   @(CYG_LABEL_DEFN(hal_interrupt_handlers),er0),er2
 
        mov.l   @(CYG_LABEL_DEFN(hal_interrupt_data),er0),er1
 
        shlr2   er0
 
        jsr     @er2
 
        ; on return d0 bit 1 will indicate whether a DSR is
        ; to be posted. Pass this together with a pointer to
        ; the interrupt object we have just used to the
        ; interrupt tidy up routine.
 
        ; D3 is defined to be saved across procedure calls, and
        ; should still contain the vector byte index. Similarly,
        ; A2 should still point to the saved machine state.
 
#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
        ; If interrupt was caused by GDB, the ISR call above
        ; is skipped by jumping here.
2:
#endif
 
#if defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK) && !defined(CYGPKG_CYGMON)
 
        ; If we are returning from the last nested interrupt, move back
        ; to the thread stack. interrupt_end() must be called on the
        ; thread stack since it potentially causes a context switch.
 
        mov.l   @sp+,sp                         ; pop old sp
 
#endif
 
#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
 
        ; We only need to call _interrupt_end() when there is a kernel
        ; present to do any tidying up.
 
        ; Using the vector offset in D3, get the interrupt object pointer
        ; into D1.
        mov.l   @CYG_LABEL_DEFN(_intvector),er1
        shll2   er1
        mov.l   @(CYG_LABEL_DEFN(hal_interrupt_objects),er1),er1
 
        ; Even when this is not the last nested interrupt, we must call
        ; _interrupt_end() to post the DSR and decrement the scheduler
        ; lock.
 
        mov.l   er3,er2                         ; arg3 = saved state.
 
        jsr     @CYG_LABEL_DEFN(interrupt_end)  ; call interrupt end fn
#endif
 
 
#       show_interrupts
 
        hal_diag_restore
 
        hal_cpu_load_all
#ifdef CYGPKG_CYGMON
        hal_cygmon_restore_app_stack
#endif
        mov.l   er0,@-sp
        mov.l   @(4:16,sp),er0
        mov.l   er0,@__lastpc
        mov.l   @sp+,er0
 
        rte                                     ; and return
 
        .section        .bss
        .global CYG_LABEL_DEFN(_intvector)
CYG_LABEL_DEFN(_intvector):
        .long   0
        .global __lastpc
__lastpc:
        .long   0
__interrupt_table:
        .long   0
 
        .text
##-----------------------------------------------------------------------------
## Execute pending DSRs on the interrupt stack with interrupts enabled.
## Note: this can only be called from code running on a thread stack
 
#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
        .extern CYG_LABEL_DEFN(cyg_interrupt_call_pending_DSRs)
        .global CYG_LABEL_DEFN(hal_interrupt_stack_call_pending_DSRs)
 
CYG_LABEL_DEFN(hal_interrupt_stack_call_pending_DSRs):
        h8300_var_call_pending_DSR
#endif
 
##-----------------------------------------------------------------------------
## Default TRAP VSR
 
        .text
        .globl  CYG_LABEL_DEFN(__default_trap_vsr)
CYG_LABEL_DEFN(__default_trap_vsr):
 
#ifdef CYG_HAL_DIAG_EXCPT_END
        hal_diag_excpt_start
#endif
        mov.l   @CYG_LABEL_DEFN(_intvector),er1
        cmp.l   #11,er1         ; Adjust trap entry address
        bne     1f
        h8300_trap_adjust_pc
1:
        mov.l   sp,er0
        jsr     @CYG_LABEL_DEFN(cyg_hal_exception_handler)
 
#ifdef CYG_HAL_DIAG_EXCPT_END
        hal_diag_excpt_end
#endif
        hal_cpu_load_all
#ifdef CYGPKG_CYGMON
        hal_cygmon_restore_app_stack
#endif
        rte
 
##-----------------------------------------------------------------------------
## VSR table. The VSRs pointed to by this table are called from the stubs
## connected to the hardware.
 
#ifndef CYG_HAL_H8300_VSR_TABLE_DEFINED
 
        .data
 
        .globl  CYG_LABEL_DEFN(hal_vsr_table)
CYG_LABEL_DEFN(hal_vsr_table):
        .long   CYG_LABEL_DEFN(__default_trap_vsr)
        .long   CYG_LABEL_DEFN(__default_trap_vsr)
        .long   0
        .long   0
        .long   0
        .long   CYG_LABEL_DEFN(__default_trap_vsr)
        .long   CYG_LABEL_DEFN(__default_trap_vsr)
        .long   CYG_LABEL_DEFN(__default_trap_vsr)
        .long   CYG_LABEL_DEFN(__default_trap_vsr)
        .long   CYG_LABEL_DEFN(__default_trap_vsr)
        .long   CYG_LABEL_DEFN(__default_trap_vsr)
        .long   CYG_LABEL_DEFN(__default_trap_vsr)
 
        .rept   CYG_ISR_TABLE_SIZE-12
        .long   CYG_LABEL_DEFN(__default_interrupt_vsr)
        .endr
#endif
 
##-----------------------------------------------------------------------------
## Interrupt tables
 
        .data
 
        .extern CYG_LABEL_DEFN(hal_default_isr)
 
        .globl  CYG_LABEL_DEFN(hal_interrupt_handlers)
CYG_LABEL_DEFN(hal_interrupt_handlers):
        .rept   CYG_ISR_TABLE_SIZE
        .long   CYG_LABEL_DEFN(hal_default_isr)
        .endr
 
        .globl  CYG_LABEL_DEFN(hal_interrupt_data)
CYG_LABEL_DEFN(hal_interrupt_data):
        .rept   CYG_ISR_TABLE_SIZE
        .long   0
        .endr
 
        .globl  CYG_LABEL_DEFN(hal_interrupt_objects)
CYG_LABEL_DEFN(hal_interrupt_objects):
        .rept   CYG_ISR_TABLE_SIZE
        .long   0
        .endr
 
 
##-----------------------------------------------------------------------------
## Temporary interrupt stack
 
        .section        .bss
 
        .balign 2
        .global _cyg_interrupt_stack_base
_cyg_interrupt_stack_base:
__interrupt_stack_base:
        .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
        .byte 0
        .endr
        .balign 2
        .global _cyg_interrupt_stack
_cyg_interrupt_stack:
__interrupt_stack:
 
#ifdef CYGPKG_CYGMON
        .balign 2
        .global __cygmon_interrupt_stack_base
__cygmon_interrupt_stack_base:
        .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
        .byte 0
        .endr
        .balign 2
        .global __cygmon_interrupt_stack
__cygmon_interrupt_stack:
#endif
 
        .long   0,0,0,0,0,0,0,0
 
##-----------------------------------------------------------------------------
 
        .data
        hal_diag_data
 
 
##-----------------------------------------------------------------------------
## end of vectors.S
 

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Line No.	Rev	Author	Line
1	786	skrzyp	`##=============================================================================`
2			`##`
3			`## vectors.S`
4			`##`
5			`## H8/300 exception vectors`
6			`##`
7			`##=============================================================================`
8			`## ####ECOSGPLCOPYRIGHTBEGIN####`
9			`## -------------------------------------------`
10			`## This file is part of eCos, the Embedded Configurable Operating System.`
11			`## Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.`
12			`##`
13			`## eCos is free software; you can redistribute it and/or modify it under`
14			`## the terms of the GNU General Public License as published by the Free`
15			`## Software Foundation; either version 2 or (at your option) any later`
16			`## version.`
17			`##`
18			`## eCos is distributed in the hope that it will be useful, but WITHOUT`
19			`## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or`
20			`## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License`
21			`## for more details.`
22			`##`
23			`## You should have received a copy of the GNU General Public License`
24			`## along with eCos; if not, write to the Free Software Foundation, Inc.,`
25			`## 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.`
26			`##`
27			`## As a special exception, if other files instantiate templates or use`
28			`## macros or inline functions from this file, or you compile this file`
29			`## and link it with other works to produce a work based on this file,`
30			`## this file does not by itself cause the resulting work to be covered by`
31			`## the GNU General Public License. However the source code for this file`
32			`## must still be made available in accordance with section (3) of the GNU`
33			`## General Public License v2.`
34			`##`
35			`## This exception does not invalidate any other reasons why a work based`
36			`## on this file might be covered by the GNU General Public License.`
37			`## -------------------------------------------`
38			`## ####ECOSGPLCOPYRIGHTEND####`
39			`##=============================================================================`
40			`#######DESCRIPTIONBEGIN####`
41			`##`
42			`## Author(s): Yoshinori Sato`
43			`## Contributors: Yoshinori Sato`
44			`## Date: 2002-02-14`
45			`## Purpose: H8/300 exception vectors`
46			`## Description: This file defines the code placed into the exception`
47			`## vectors. It also contains the first level default VSRs`
48			`## that save and restore state for both exceptions and`
49			`## interrupts.`
50			`##`
51			`######DESCRIPTIONEND####`
52			`##`
53			`##=============================================================================`
54
55			`#include`
56
57			`#ifdef CYGPKG_REDBOOT`
58			`#include`
59			`#endif`
60
61			`#ifdef CYGPKG_KERNEL`
62
63			`#include`
64
65			`#endif`
66
67			`#include`
68			`#include`
69			`#include`
70
71
72			`##-----------------------------------------------------------------------------`
73
74			`#ifdef CYGPKG_HAL_H8300_H8300H`
75			`.h8300h`
76			`.macro shll2 reg`
77			`shll.l \reg`
78			`shll.l \reg`
79			`.endm`
80			`.macro shlr2 reg`
81			`shlr.l \reg`
82			`shlr.l \reg`
83			`.endm`
84			`#endif`
85			`#ifdef CYGPKG_HAL_H8300_H8S`
86			`.h8300s`
87			`.macro shll2 reg`
88			`shll.l #2,\reg`
89			`.endm`
90			`.macro shlr2 reg`
91			`shlr.l #2,\reg`
92			`.endm`
93			`#endif`
94
95			`#ifdef CYGPKG_CYGMON`
96			`##-----------------------------------------------------------------------------`
97			`## Macros for Stack handling when running Cygmon`
98
99			`.macro hal_cygmon_switch_app_stack`
100			`#ifdef CYGPKG_HAL_H8300_H8300H`
101			`; Switch to interrupt stack to handle exception`
102
103			`; First, save some scratch registers`
104			`mov.l er0,@-sp`
105			`mov.l er1,@-sp`
106
107			`; Copy the exception frame`
108			`mov.l #__cygmon_interrupt_stack,er0`
109			`mov.l @(8:16,sp),er1`
110			`mov.l er1,@-er0`
111
112			`; Save the pre-exception sp in the register image`
113			`mov.l sp,@-er0`
114
115			`; Actually switch the stack`
116			`mov.l er0,sp`
117
118			`mov.l @sp,er0`
119			`adds #4,er0`
120			`adds #4,er0`
121			`mov.l er0,@sp`
122
123			`; Now, restore the scratch registers`
124			`mov.l @(-4:16,er0),er1`
125			`mov.l @(-8:16,er0),er0`
126			`#endif`
127			`#ifdef CYGPKG_HAL_H8300_H8S`
128			`; Switch to interrupt stack to handle exception`
129
130			`; First, save some scratch registers`
131			`stm.l er0-er1,@-sp`
132
133			`; Copy the exception frame`
134			`mov.l #__cygmon_interrupt_stack,er0`
135			`mov.l @(10,sp:16),er1`
136			`mov.l er1,@-er0`
137			`mov.w @(10,sp:16),r1`
138			`mov.w r1,@-er0`
139
140			`; Save the pre-exception sp in the register image`
141			`mov.l sp,@-er0`
142
143			`; Actually switch the stack`
144			`mov.l er0,sp`
145
146			`mov.l @sp,er0`
147			`adds #4,er0`
148			`adds #4,er0`
149			`mov.l er0,@sp`
150
151			`; Now, restore the scratch registers`
152			`mov.l @(-4:16,er0),er1`
153			`mov.l @(-8:16,er0),er0`
154			`#endif`
155			`.endm`
156
157			`.macro hal_cygmon_restore_app_stack`
158			`// For cygmon we are switching stacks immediately on exception.`
159			`// We must wait until the very end before restoring the original stack.`
160
161			`#ifdef CYGPKG_HAL_H8300_H8300H`
162			`; Save some scratch registers`
163			`subs #4,sp`
164			`mov.l er0,@-sp`
165			`mov.l er1,@-sp`
166
167			`; We need to restore the application stack pointer, but we also`
168			`; need to restore the exception frame.`
169			`mov.l @(12:16,sp),er0`
170			`mov.l @(16:16,sp),er1`
171			`mov.l er1,@er0`
172			`mov.l er0,@(8:16,sp)`
173
174			`; Restore the scratch registers`
175			`mov.l @sp+,er1`
176			`mov.l @sp+,er0`
177			`mov.l @sp+,sp // Restore the frame-adjusted SP`
178			`#endif`
179			`#ifdef CYGPKG_HAL_H8300_H8S`
180			`; Save some scratch registers`
181			`subs #4,sp`
182			`stm.l er0-er1,@-sp`
183
184			`; We need to restore the application stack pointer, but we also`
185			`; need to restore the exception frame.`
186			`mov.l @(12:16,sp),er0`
187			`mov.w @(16:16,sp),r1`
188			`mov.w r1,@er0`
189			`mov.l @(18:16,sp),er1`
190			`mov.l er1,@er0`
191			`mov.l er0,@(8:16,sp)`
192
193			`; Restore the scratch registers`
194			`ldm.l @sp+,er0-er1`
195			`mov.l @sp+,sp // Restore the frame-adjusted SP`
196			`#endif`
197			`.endm`
198
199			`#endif // CYGPKG_CYGMON`
200
201			`##-----------------------------------------------------------------------------`
202
203			`#if (defined(CYG_HAL_STARTUP_ROM) \|\| \`
204			`defined(CYGPKG_HAL_H8300_H8300H_SIM) \|\| \`
205			`defined(CYGPKG_HAL_H8300_H8S_SIM))`
206
207			`.section .vectors,"a"`
208
209			`.globl reset_vector`
210
211			`reset_vector:`
212			`.long CYG_LABEL_DEFN(_start)`
213			`.long CYG_LABEL_DEFN(_start)`
214			`vector = 2`
215			`.rept CYG_ISR_TABLE_SIZE-2`
216			`.long interrupt_redirect_table+vector*4`
217			`vector = vector + 1`
218			`.endr`
219			`#endif`
220
221			`#if !defined(CYGSEM_HAL_H8300_VECTOR_HOOK)`
222			`.section .int_hook_table,"ax"`
223			`interrupt_redirect_table:`
224			`vector = 0`
225			`.rept CYG_ISR_TABLE_SIZE`
226			`jsr @interrupt_entry`
227			`vector = vector + 1`
228			`.endr`
229			`#else`
230			`.section .int_hook_table,"x"`
231			`interrupt_redirect_table:`
232			`.space 4*CYG_ISR_TABLE_SIZE`
233			`#endif`
234
235			`##-----------------------------------------------------------------------------`
236			`## Startup code`
237
238			`.text`
239
240			`.globl CYG_LABEL_DEFN(_start)`
241			`CYG_LABEL_DEFN(_start):`
242			`; set up stack`
243
244			`mov.l #__interrupt_stack,sp`
245
246			`; Initialize hardware`
247			`hal_cpu_init`
248			`hal_mmu_init`
249			`hal_memc_init`
250			`hal_diag_init`
251			`hal_intc_init`
252			`hal_cache_init`
253			`hal_timer_init`
254			`hal_mon_init`
255
256			`#ifdef CYG_HAL_STARTUP_ROM`
257
258			`; Copy data from ROM to RAM`
259
260			`mov.l #CYG_LABEL_DEFN(__rom_data_start),er5`
261			`mov.l #CYG_LABEL_DEFN(__ram_data_start),er6`
262			`mov.l #CYG_LABEL_DEFN(__ram_data_end),er4`
263			`sub.l er6,er4`
264			`shlr2 er4`
265			`1:`
266			`mov.l @er5+,er0`
267			`mov.l er0,@er6`
268			`adds #4,er6`
269			`dec.l #1,er4`
270			`bne 1b`
271
272			`#endif`
273
274			`#if defined(CYGSEM_HAL_H8300_VECTOR_HOOK)`
275			`; Setup Interrupt Vector (virtual)`
276
277			`;; check rom table`
278			`mov.l #8*4,er0`
279			`mov.l @er0+,er1`
280			`adds #4,er1`
281			`mov.b #3,r3l`
282			`1:`
283			`mov.l @er0+,er2`
284			`cmp.l er1,er2`
285			`bne 3f`
286			`adds #4,er1`
287			`dec.b r3l`
288			`bne 1b`
289			`;; calculate vector address`
290			`mov.l @8*4,er0`
291			`and.w #0xff,e0`
292			`sub.l #8*4,er0`
293			`;; build ram vector`
294			`mov.l er0,@__interrupt_table`
295			`mov.l #0x5e000000+interrupt_entry,er1`
296			`mov.l #save_vector_table,er3`
297			`mov.b #0,r2l`
298			`2:`
299			`;; check saved vector`
300			`mov.b @er3+,r2h`
301			`cmp.b r2l,r2h`
302			`beq 5f`
303			`subs #1,er3`
304			`mov.l er1,@er0`
305			`5:`
306			`adds #4,er0`
307			`inc.b r2l`
308			`cmp.b #CYG_ISR_TABLE_SIZE,r2l`
309			`bcs 2b`
310			`bra 4f`
311			`3:`
312			`bra 3b`
313			`4:`
314
315			`#else`
316			`mov.l #interrupt_redirect_table,er0`
317			`mov.l er0,@__interrupt_table`
318			`#endif`
319
320			`; Clear BSS`
321			`mov.l #CYG_LABEL_DEFN(__bss_start),er5`
322			`mov.l #CYG_LABEL_DEFN(__bss_end),er4`
323			`sub.l #CYG_LABEL_DEFN(__bss_start),er4`
324			`shlr2 er4`
325			`sub.l er0,er0`
326			`1:`
327			`mov.l er0,@er5`
328			`adds #4,er5`
329			`dec.l #1,er4`
330			`bne 1b`
331
332			`; Call variant and platform HAL`
333			`; initialization routines.`
334
335			`.extern CYG_LABEL_DEFN(hal_variant_init)`
336			`jsr @CYG_LABEL_DEFN(hal_variant_init)`
337
338			`.extern CYG_LABEL_DEFN(hal_platform_init)`
339			`jsr @CYG_LABEL_DEFN(hal_platform_init)`
340
341			`; Call constructors`
342
343			`.extern CYG_LABEL_DEFN(cyg_hal_invoke_constructors)`
344			`jsr @CYG_LABEL_DEFN(cyg_hal_invoke_constructors)`
345
346			`#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS`
347			`.extern CYG_LABEL_DEFN(initialize_stub)`
348			`jsr @CYG_LABEL_DEFN(initialize_stub)`
349			`#endif`
350
351			`#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \`
352			`\|\| defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)`
353			`.extern CYG_LABEL_DEFN(hal_ctrlc_isr_init)`
354			`jsr @CYG_LABEL_DEFN(hal_ctrlc_isr_init)`
355			`#endif`
356
357
358			`; Call cyg_start`
359			`sub.l er0,er0`
360
361			`.extern CYG_LABEL_DEFN(cyg_start)`
362			`jsr @CYG_LABEL_DEFN(cyg_start)`
363
364			`9:`
365			`bra 9b ; Loop if we return`
366
367			`save_vector_table:`
368			`#if defined(CYGSEM_HAL_H8300_SAVE_STUB_VECTOR)`
369			`.byte 5,11`
370			`#if defined(CYGPKG_HAL_H8300_SAVED_VECTORS)`
371			`h8300_save_vectors`
372			`#endif`
373			`#endif`
374			`.byte 0 ; end maker`
375			`.align 2`
376
377			`interrupt_entry:`
378			`mov.l er0,@-sp`
379			`mov.l @(4:16,sp),er0 ; interrupt vector offset`
380			`mov.l er1,@-sp`
381			`mov.l @__interrupt_table,er1`
382			`sub.l er1,er0`
383			`shlr2 er0`
384			`dec.l #1,er0`
385			`mov.l er0,@CYG_LABEL_DEFN(_intvector)`
386			`mov.l @sp+,er1`
387			`mov.l @sp+,er0`
388			`adds #4,sp`
389			`#ifdef CYGPKG_CYGMON`
390			`hal_cygmon_switch_app_stack`
391			`#endif`
392			`hal_cpu_save_all`
393			`h8300_var_interrupt_entry ; load isr address`
394			`jmp @er0`
395
396			`##-----------------------------------------------------------------------------`
397			`## The following macros are defined depending on whether the HAL is configured`
398			`## to support the kernel or not.`
399
400			`#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT`
401
402			`.extern CYG_LABEL_DEFN(cyg_scheduler_sched_lock)`
403
404			`; Increment the scheduler lock`
405
406			`.macro increment_sched_lock reg=er0`
407			`mov.l @CYG_LABEL_DEFN(cyg_scheduler_sched_lock),\reg`
408			`inc.l #1,\reg`
409			`mov.l \reg,@CYG_LABEL_DEFN(cyg_scheduler_sched_lock)`
410			`.endm`
411
412			`#else`
413
414			`.macro increment_sched_lock reg=er0`
415			`.endm`
416
417			`#endif`
418
419			`##-----------------------------------------------------------------------------`
420			`## Default interrupt VSR`
421
422			`.text`
423			`.globl CYG_LABEL_DEFN(__default_interrupt_vsr)`
424			`CYG_LABEL_DEFN(__default_interrupt_vsr):`
425
426			`; We come here with all the registers pushed`
427			`; onto the stack.`
428
429			`hal_diag_intr_start`
430
431			`increment_sched_lock`
432
433			`#if defined(CYGPKG_CYGMON)`
434			`// For Cygmon, we saved this back when we originally switched stacks.`
435			`mov.l sp,er1 ; A2 = saved thread state`
436			`#elif defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK)`
437			`; Increment interrupt nesting counter`
438			`mov.l sp,er1`
439			`mov.l #__interrupt_stack,er0 ; A0 = interrupt stack top`
440			`cmp.l #__interrupt_stack_base,sp ; compare with base of stack`
441			`blt 1f ; if lt switch to int stack`
442			`cmp.l er0,sp ; compare sp with stack top`
443			`ble 8f ; if le already on istack`
444			`1:`
445			`mov.l er0,sp ; switch to new SP`
446			`8:`
447			`mov.l er1,@-sp ; save old SP`
448
449			`#else`
450			`mov sp,er1 ; A2 = saved thread state`
451			`#endif`
452			`mov.l er1,er4`
453
454			`; Here D3 contains the table byte offset of the vector to`
455			`; call.`
456
457			`#if defined(CYGPKG_KERNEL_INSTRUMENT) && defined(CYGDBG_KERNEL_INSTRUMENT_INTR)`
458
459			`; Call cyg_instrument to record that this interrupt is being raised.`
460
461			`.extern CYG_LABEL_DEFN(cyg_instrument)`
462			`mov.l #0x0301,er0 ; type = INTR,RAISE`
463			`mov.l @CYG_LABEL_DEFN(_intvector),er2 ; arg2 = table offset`
464			`jsr CYG_LABEL_DEFN(cyg_instrument) ; call instrumentation`
465
466			`#endif`
467
468			`#ifdef CYGSEM_HAL_COMMON_INTERRUPTS_ALLOW_NESTING`
469
470			`; To allow nested interrupts, we set the IE bit. We do`
471			`; not touch the IPL bits, so only higher priority interrupts`
472			`; will be nested on top of us. Also, new interrupts will not`
473			`; be delivered until the ISR calls`
474			`; Cyg_Interrupt::acknowledge_interrupt(). At some future point`
475			`; we may want to do the ack stuff here to allow immediate nesting.`
476
477			`mov.l @CYG_LABEL_DEFN(_intvector),er0`
478			`mov.b @(CYG_LABEL_DEFN(cyg_hal_level_table),er0),r0l`
479			`hal_cpu_set_int_level`
480			`#endif`
481			`#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \|\| \`
482			`defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)`
483
484			`; If we have Ctrl-C support enabled, save a pointer to the`
485			`; saved CPU state here so we can plant a breakpoint there if`
486			`; this is a ^C.`
487
488			`.extern CYG_LABEL_DEFN(hal_saved_interrupt_state)`
489			`mov.l er4,@CYG_LABEL_DEFN(hal_saved_interrupt_state)`
490
491			`#endif`
492			`mov.l @CYG_LABEL_DEFN(_intvector),er0`
493			`shll2 er0`
494			`mov.l @(CYG_LABEL_DEFN(hal_interrupt_handlers),er0),er2`
495
496			`mov.l @(CYG_LABEL_DEFN(hal_interrupt_data),er0),er1`
497
498			`shlr2 er0`
499
500			`jsr @er2`
501
502			`; on return d0 bit 1 will indicate whether a DSR is`
503			`; to be posted. Pass this together with a pointer to`
504			`; the interrupt object we have just used to the`
505			`; interrupt tidy up routine.`
506
507			`; D3 is defined to be saved across procedure calls, and`
508			`; should still contain the vector byte index. Similarly,`
509			`; A2 should still point to the saved machine state.`
510
511			`#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT`
512			`; If interrupt was caused by GDB, the ISR call above`
513			`; is skipped by jumping here.`
514			`2:`
515			`#endif`
516
517			`#if defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK) && !defined(CYGPKG_CYGMON)`
518
519			`; If we are returning from the last nested interrupt, move back`
520			`; to the thread stack. interrupt_end() must be called on the`
521			`; thread stack since it potentially causes a context switch.`
522
523			`mov.l @sp+,sp ; pop old sp`
524
525			`#endif`
526
527			`#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT`
528
529			`; We only need to call _interrupt_end() when there is a kernel`
530			`; present to do any tidying up.`
531
532			`; Using the vector offset in D3, get the interrupt object pointer`
533			`; into D1.`
534			`mov.l @CYG_LABEL_DEFN(_intvector),er1`
535			`shll2 er1`
536			`mov.l @(CYG_LABEL_DEFN(hal_interrupt_objects),er1),er1`
537
538			`; Even when this is not the last nested interrupt, we must call`
539			`; _interrupt_end() to post the DSR and decrement the scheduler`
540			`; lock.`
541
542			`mov.l er3,er2 ; arg3 = saved state.`
543
544			`jsr @CYG_LABEL_DEFN(interrupt_end) ; call interrupt end fn`
545			`#endif`
546
547
548			`# show_interrupts`
549
550			`hal_diag_restore`
551
552			`hal_cpu_load_all`
553			`#ifdef CYGPKG_CYGMON`
554			`hal_cygmon_restore_app_stack`
555			`#endif`
556			`mov.l er0,@-sp`
557			`mov.l @(4:16,sp),er0`
558			`mov.l er0,@__lastpc`
559			`mov.l @sp+,er0`
560
561			`rte ; and return`
562
563			`.section .bss`
564			`.global CYG_LABEL_DEFN(_intvector)`
565			`CYG_LABEL_DEFN(_intvector):`
566			`.long 0`
567			`.global __lastpc`
568			`__lastpc:`
569			`.long 0`
570			`__interrupt_table:`
571			`.long 0`
572
573			`.text`
574			`##-----------------------------------------------------------------------------`
575			`## Execute pending DSRs on the interrupt stack with interrupts enabled.`
576			`## Note: this can only be called from code running on a thread stack`
577
578			`#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK`
579			`.extern CYG_LABEL_DEFN(cyg_interrupt_call_pending_DSRs)`
580			`.global CYG_LABEL_DEFN(hal_interrupt_stack_call_pending_DSRs)`
581
582			`CYG_LABEL_DEFN(hal_interrupt_stack_call_pending_DSRs):`
583			`h8300_var_call_pending_DSR`
584			`#endif`
585
586			`##-----------------------------------------------------------------------------`
587			`## Default TRAP VSR`
588
589			`.text`
590			`.globl CYG_LABEL_DEFN(__default_trap_vsr)`
591			`CYG_LABEL_DEFN(__default_trap_vsr):`
592
593			`#ifdef CYG_HAL_DIAG_EXCPT_END`
594			`hal_diag_excpt_start`
595			`#endif`
596			`mov.l @CYG_LABEL_DEFN(_intvector),er1`
597			`cmp.l #11,er1 ; Adjust trap entry address`
598			`bne 1f`
599			`h8300_trap_adjust_pc`
600			`1:`
601			`mov.l sp,er0`
602			`jsr @CYG_LABEL_DEFN(cyg_hal_exception_handler)`
603
604			`#ifdef CYG_HAL_DIAG_EXCPT_END`
605			`hal_diag_excpt_end`
606			`#endif`
607			`hal_cpu_load_all`
608			`#ifdef CYGPKG_CYGMON`
609			`hal_cygmon_restore_app_stack`
610			`#endif`
611			`rte`
612
613			`##-----------------------------------------------------------------------------`
614			`## VSR table. The VSRs pointed to by this table are called from the stubs`
615			`## connected to the hardware.`
616
617			`#ifndef CYG_HAL_H8300_VSR_TABLE_DEFINED`
618
619			`.data`
620
621			`.globl CYG_LABEL_DEFN(hal_vsr_table)`
622			`CYG_LABEL_DEFN(hal_vsr_table):`
623			`.long CYG_LABEL_DEFN(__default_trap_vsr)`
624			`.long CYG_LABEL_DEFN(__default_trap_vsr)`
625			`.long 0`
626			`.long 0`
627			`.long 0`
628			`.long CYG_LABEL_DEFN(__default_trap_vsr)`
629			`.long CYG_LABEL_DEFN(__default_trap_vsr)`
630			`.long CYG_LABEL_DEFN(__default_trap_vsr)`
631			`.long CYG_LABEL_DEFN(__default_trap_vsr)`
632			`.long CYG_LABEL_DEFN(__default_trap_vsr)`
633			`.long CYG_LABEL_DEFN(__default_trap_vsr)`
634			`.long CYG_LABEL_DEFN(__default_trap_vsr)`
635
636			`.rept CYG_ISR_TABLE_SIZE-12`
637			`.long CYG_LABEL_DEFN(__default_interrupt_vsr)`
638			`.endr`
639			`#endif`
640
641			`##-----------------------------------------------------------------------------`
642			`## Interrupt tables`
643
644			`.data`
645
646			`.extern CYG_LABEL_DEFN(hal_default_isr)`
647
648			`.globl CYG_LABEL_DEFN(hal_interrupt_handlers)`
649			`CYG_LABEL_DEFN(hal_interrupt_handlers):`
650			`.rept CYG_ISR_TABLE_SIZE`
651			`.long CYG_LABEL_DEFN(hal_default_isr)`
652			`.endr`
653
654			`.globl CYG_LABEL_DEFN(hal_interrupt_data)`
655			`CYG_LABEL_DEFN(hal_interrupt_data):`
656			`.rept CYG_ISR_TABLE_SIZE`
657			`.long 0`
658			`.endr`
659
660			`.globl CYG_LABEL_DEFN(hal_interrupt_objects)`
661			`CYG_LABEL_DEFN(hal_interrupt_objects):`
662			`.rept CYG_ISR_TABLE_SIZE`
663			`.long 0`
664			`.endr`
665
666
667			`##-----------------------------------------------------------------------------`
668			`## Temporary interrupt stack`
669
670			`.section .bss`
671
672			`.balign 2`
673			`.global _cyg_interrupt_stack_base`
674			`_cyg_interrupt_stack_base:`
675			`__interrupt_stack_base:`
676			`.rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE`
677			`.byte 0`
678			`.endr`
679			`.balign 2`
680			`.global _cyg_interrupt_stack`
681			`_cyg_interrupt_stack:`
682			`__interrupt_stack:`
683
684			`#ifdef CYGPKG_CYGMON`
685			`.balign 2`
686			`.global __cygmon_interrupt_stack_base`
687			`__cygmon_interrupt_stack_base:`
688			`.rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE`
689			`.byte 0`
690			`.endr`
691			`.balign 2`
692			`.global __cygmon_interrupt_stack`
693			`__cygmon_interrupt_stack:`
694			`#endif`
695
696			`.long 0,0,0,0,0,0,0,0`
697
698			`##-----------------------------------------------------------------------------`
699
700			`.data`
701			`hal_diag_data`
702
703
704			`##-----------------------------------------------------------------------------`
705			`## end of vectors.S`
706