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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [h8300/] [h8s/] [current/] [src/] [h8300_h8s.ld] - Blame information for rev 786

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Line No. Rev Author Line
1 786 skrzyp
//===========================================================================
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//
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// MLT linker script for H8/300H
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//
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//===========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//===========================================================================
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#include 
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#include 
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#include 
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STARTUP(vectors.o)
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ENTRY(CYG_LABEL_DEFN(_start))
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#ifdef EXTRAS
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INPUT(extras.o)
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#endif
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GROUP(libtarget.a libgcc.a)
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#define ALIGN_LMA 4
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#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1))
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#define LMA_EQ_VMA
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#define FORCE_OUTPUT . = .
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#define SECTIONS_BEGIN
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#define SECTION_rom_vectors(_region_, _vma_, _lma_) \
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    .vectors _vma_ : _lma_ \
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    { FORCE_OUTPUT; KEEP (*(.vectors)) } \
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    > _region_
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#define SECTION_text(_region_, _vma_, _lma_) \
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    .text _vma_ : _lma_ \
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    { CYG_LABEL_DEFN(_stext) = ABSOLUTE(.); \
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    *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) } \
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    > _region_ \
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    CYG_LABEL_DEFN(_etext) = .; PROVIDE (etext = .);
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#define SECTION_fini(_region_, _vma_, _lma_) \
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    .fini _vma_ : _lma_ \
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    { FORCE_OUTPUT; *(.fini) } \
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    > _region_
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#define SECTION_rodata(_region_, _vma_, _lma_) \
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    .rodata _vma_ : _lma_ \
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    { FORCE_OUTPUT; *(.rodata*) } \
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    > _region_
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#define SECTION_rodata1(_region_, _vma_, _lma_) \
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    .rodata1 _vma_ : _lma_ \
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    { FORCE_OUTPUT; *(.rodata1) } \
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    > _region_
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#define SECTION_fixup(_region_, _vma_, _lma_) \
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    .fixup _vma_ : _lma_ \
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    { FORCE_OUTPUT; *(.fixup) } \
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    > _region_
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#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \
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    .gcc_except_table _vma_ : _lma_ \
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    { FORCE_OUTPUT; *(.gcc_except_table) } \
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    > _region_
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#if defined(CYGSEM_HAL_H8300_VECTOR_HOOK)
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#define SECTION_int_hook_table(_region_, _vma_, _lma_) \
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    .int_hook_table CYGHWR_HAL_H8300_VECTOR_ADDRESS : _lma_ \
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    { CYG_LABEL_DEFN(__int_hook_start) = ABSOLUTE (.); \
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      FORCE_OUTPUT; *(.int_hook_table) } \
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    > _region_ \
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    CYG_LABEL_DEFN(__rom_int_hook_table) = LOADADDR(.int_hook_table); \
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    CYG_LABEL_DEFN(__int_hook_end) = .;
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#else
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#define SECTION_int_hook_table(_region_, _vma_, _lma_) \
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    .int_hook_table _vma_ : _lma_ \
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    { CYG_LABEL_DEFN(__int_hook_start) = ABSOLUTE (.); \
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      FORCE_OUTPUT; *(.int_hook_table) } \
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    > _region_
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#endif
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#define SECTION_data(_region_, _vma_, _lma_) \
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    .data _vma_ : _lma_ \
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    { CYG_LABEL_DEFN(__ram_data_start) = ABSOLUTE (.); *(.data*) *(.data1) \
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    . = ALIGN(4); \
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    KEEP(*( SORT (.ecos.table.*))) ; \
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    . = ALIGN(4); \
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    CYG_LABEL_DEFN(_GOT1_START_) = ABSOLUTE (.); *(.got1) CYG_LABEL_DEFN(_GOT1_END_) = ABSOLUTE (.); \
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    CYG_LABEL_DEFN(_GOT2_START_) = ABSOLUTE (.); *(.got2) CYG_LABEL_DEFN(_GOT2_END_) = ABSOLUTE (.); \
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    . = ALIGN (4); \
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    CYG_LABEL_DEFN(__CTOR_LIST__) = ABSOLUTE (.); KEEP (*(SORT (.ctors*))) CYG_LABEL_DEFN(__CTOR_END__) = ABSOLUTE (.); \
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    CYG_LABEL_DEFN(__DTOR_LIST__) = ABSOLUTE (.); KEEP (*(SORT (.dtors*))) CYG_LABEL_DEFN(__DTOR_END__) = ABSOLUTE (.); \
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    CYG_LABEL_DEFN(_GOT_START) = ABSOLUTE (.); CYG_LABEL_DEFN(_GLOBAL_OFFSET_TABLE_) = ABSOLUTE (.) + 32768; CYG_LABEL_DEFN(_SDA_BASE_) = ABSOLUTE (.); \
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    *(.got.plt) *(.got) CYG_LABEL_DEFN(_GOT_END_) = ABSOLUTE (.); \
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    *(.dynamic) *(.sdata*) *(.sbss*) } \
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    > _region_ \
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    CYG_LABEL_DEFN(__rom_data_start) = LOADADDR (.data); \
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    CYG_LABEL_DEFN(__ram_data_end) = .; PROVIDE (CYG_LABEL_DEFN(__ram_data_end) = .); CYG_LABEL_DEFN(_edata) = .; PROVIDE (edata = .);
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#define SECTION_bss(_region_, _vma_, _lma_) \
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    .bss _vma_ : _lma_ \
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    { CYG_LABEL_DEFN(__bss_start) = ABSOLUTE (.); \
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    *(.scommon) *(.dynbss) *(.bss.*) *(COMMON) \
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    CYG_LABEL_DEFN(__bss_end) = ABSOLUTE (.); } \
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    > _region_
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#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .);
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#include CYGHWR_MEMORY_LAYOUT_LDI
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#include CYGBLD_HAL_PLATFORM_H
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CYG_LABEL_DEFN(hal_virtual_vector_table) = CYGHWR_HAL_VECTOR_TABLE;

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