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skrzyp |
#ifndef CYGONCE_HAL_HAL_INTR_H
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#define CYGONCE_HAL_HAL_INTR_H
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//==========================================================================
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//
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// hal_intr.h
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//
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// HAL Interrupt and clock support
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//
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//==========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): proven
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// Contributors: proven, jskov, pjo, nickg
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// Date: 1999-02-20
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// Purpose: Define Interrupt support
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// Description: The macros defined here provide the HAL APIs for handling
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// interrupts and the clock.
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//
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// Usage:
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// #include <cyg/hal/hal_intr.h>
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// ...
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#include <pkgconf/hal.h>
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#include <pkgconf/hal_i386.h>
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#include <cyg/infra/cyg_type.h>
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#include <cyg/hal/var_intr.h>
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//--------------------------------------------------------------------------
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// Exception vectors.
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// Standard exception vectors supported by most IA32 CPUs
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#define CYGNUM_HAL_VECTOR_DIV0 0
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#define CYGNUM_HAL_VECTOR_DEBUG 1
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#define CYGNUM_HAL_VECTOR_NMI 2
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#define CYGNUM_HAL_VECTOR_BREAKPOINT 3
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#define CYGNUM_HAL_VECTOR_OVERFLOW 4
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#define CYGNUM_HAL_VECTOR_BOUND 5
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#define CYGNUM_HAL_VECTOR_OPCODE 6
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#define CYGNUM_HAL_VECTOR_NO_DEVICE 7
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#define CYGNUM_HAL_VECTOR_DOUBLE_FAULT 8
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#define CYGNUM_HAL_VECTOR_INVALID_TSS 10
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#define CYGNUM_HAL_VECTOR_SEGV 11
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#define CYGNUM_HAL_VECTOR_STACK_FAULT 12
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#define CYGNUM_HAL_VECTOR_PROTECTION 13
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#define CYGNUM_HAL_VECTOR_PAGE 14
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#define CYGNUM_HAL_VECTOR_FPE 16
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#define CYGNUM_HAL_VECTOR_ALIGNMENT 17
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// The default size of the VSR table is 256 entries.
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#ifndef CYGNUM_HAL_VSR_MIN
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#define CYGNUM_HAL_VSR_MIN 0
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#define CYGNUM_HAL_VSR_MAX 255
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#define CYGNUM_HAL_VSR_COUNT 256
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#endif
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// Common exception vectors.
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#define CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION CYGNUM_HAL_VECTOR_OPCODE
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#define CYGNUM_HAL_EXCEPTION_INTERRUPT CYGNUM_HAL_VECTOR_BREAKPOINT
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#define CYGNUM_HAL_EXCEPTION_CODE_ACCESS CYGNUM_HAL_VECTOR_PROTECTION
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#define CYGNUM_HAL_EXCEPTION_DATA_ACCESS CYGNUM_HAL_VECTOR_PROTECTION
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#define CYGNUM_HAL_EXCEPTION_TRAP CYGNUM_HAL_VECTOR_DEBUG
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#define CYGNUM_HAL_EXCEPTION_FPU CYGNUM_HAL_VECTOR_FPE
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#define CYGNUM_HAL_EXCEPTION_STACK_OVERFLOW CYGNUM_HAL_VECTOR_SEGV
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#define CYGNUM_HAL_EXCEPTION_DIV_BY_ZERO CYGNUM_HAL_VECTOR_DIV0
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#define CYGNUM_HAL_EXCEPTION_OVERFLOW CYGNUM_HAL_VECTOR_OVERFLOW
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#define CYGNUM_HAL_EXCEPTION_MIN 0
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#define CYGNUM_HAL_EXCEPTION_MAX 31
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#define CYGNUM_HAL_EXCEPTION_COUNT (CYGNUM_HAL_EXCEPTION_MAX - CYGNUM_HAL_EXCEPTION_MIN + 1)
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// These really are wild guesses on my part...
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#define CYGNUM_HAL_VECTOR_SIGBUS CYGNUM_HAL_EXCEPTION_DATA_ACCESS
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#define CYGNUM_HAL_VECTOR_SIGFPE CYGNUM_HAL_EXCEPTION_FPU
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#define CYGNUM_HAL_VECTOR_SIGSEGV CYGNUM_HAL_VECTOR_SEGV
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//--------------------------------------------------------------------------
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// Static data used by HAL
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// ISR tables
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externC volatile CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT];
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externC volatile CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_ISR_COUNT];
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externC volatile CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT];
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// VSR table
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externC volatile CYG_ADDRESS hal_vsr_table[CYGNUM_HAL_VSR_COUNT];
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//--------------------------------------------------------------------------
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// Interrupt state storage
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typedef cyg_uint32 CYG_INTERRUPT_STATE;
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//---------------------------------------------------------------------------
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// Default ISR
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externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data);
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#define HAL_DEFAULT_ISR hal_default_isr
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//--------------------------------------------------------------------------
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// CPU interrupt enable/disable macros
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#define HAL_ENABLE_INTERRUPTS() \
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CYG_MACRO_START \
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asm ("sti") ; \
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CYG_MACRO_END
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#define HAL_DISABLE_INTERRUPTS(_old_) \
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CYG_MACRO_START \
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register int x ; \
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asm volatile ( \
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"pushfl ;" \
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"popl %0 ;" \
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"cli" \
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: "=r" (x) \
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) ; \
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(_old_) = (x & 0x200); \
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CYG_MACRO_END
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#define HAL_RESTORE_INTERRUPTS(_old_) \
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CYG_MACRO_START \
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register int x = _old_; \
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asm volatile ( "pushfl ;" \
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"popl %%eax ;" \
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"andl $0xFFFFFDFF,%%eax;" \
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"orl %0,%%eax;" \
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"pushl %%eax;" \
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"popfl ;" \
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: /* No outputs */ \
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: "r"(x) \
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: "eax" \
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); \
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CYG_MACRO_END
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#define HAL_QUERY_INTERRUPTS(_old_) \
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CYG_MACRO_START \
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register int x ; \
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asm volatile ("pushfl ;" \
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"popl %0" \
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: "=r" (x) \
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); \
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(_old_) = (x & 0x200); \
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CYG_MACRO_END
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//--------------------------------------------------------------------------
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// Routine to execute DSRs using separate interrupt stack
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#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
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externC void hal_interrupt_stack_call_pending_DSRs(void);
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#define HAL_INTERRUPT_STACK_CALL_PENDING_DSRS() \
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hal_interrupt_stack_call_pending_DSRs()
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// these are offered solely for stack usage testing
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// if they are not defined, then there is no interrupt stack.
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#define HAL_INTERRUPT_STACK_BASE cyg_interrupt_stack_base
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#define HAL_INTERRUPT_STACK_TOP cyg_interrupt_stack
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// use them to declare these extern however you want:
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// extern char HAL_INTERRUPT_STACK_BASE[];
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// extern char HAL_INTERRUPT_STACK_TOP[];
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// is recommended
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#endif
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//---------------------------------------------------------------------------
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// Interrupt and VSR attachment macros
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#define HAL_INTERRUPT_IN_USE( _vector_, _state_) \
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CYG_MACRO_START \
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cyg_uint32 _index_; \
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HAL_TRANSLATE_VECTOR ((_vector_), _index_); \
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\
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if (hal_interrupt_handlers[_index_] \
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==(CYG_ADDRESS)HAL_DEFAULT_ISR) \
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(_state_) = 0; \
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else \
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(_state_) = 1; \
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CYG_MACRO_END
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#ifndef HAL_INTERRUPT_ATTACH
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externC void __default_interrupt_vsr(void);
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#define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \
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CYG_MACRO_START \
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cyg_uint32 _index_; \
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HAL_TRANSLATE_VECTOR((_vector_), _index_); \
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\
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HAL_VSR_SET( _vector_, &__default_interrupt_vsr , NULL); \
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if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)HAL_DEFAULT_ISR ) \
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{ \
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hal_interrupt_handlers[_index_] = (CYG_ADDRESS)(_isr_); \
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hal_interrupt_data[_index_] = (CYG_ADDRWORD)(_data_); \
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hal_interrupt_objects[_index_] = (CYG_ADDRESS)(_object_); \
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} \
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CYG_MACRO_END
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#endif /* HAL_INTERRUPT_ATTACH */
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#define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) \
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CYG_MACRO_START \
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cyg_uint32 _index_; \
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HAL_TRANSLATE_VECTOR((_vector_), _index_); \
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\
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if (hal_interrupt_handlers[_index_] \
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== (CYG_ADDRESS)(_isr_)) \
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{ \
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hal_interrupt_handlers[_index_] = \
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(CYG_ADDRESS)HAL_DEFAULT_ISR; \
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hal_interrupt_data[_index_] = 0; \
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hal_interrupt_objects[_index_] = 0; \
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} \
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CYG_MACRO_END
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#define HAL_VSR_GET( _vector_, _pvsr_ ) \
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*((CYG_ADDRESS *)(_pvsr_)) = hal_vsr_table[(_vector_)];
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#define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ ) \
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CYG_MACRO_START \
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CYG_ADDRESS *__poldvsr = (CYG_ADDRESS *)(_poldvsr_); \
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if( __poldvsr != NULL ) \
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*__poldvsr = hal_vsr_table[(_vector_)]; \
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hal_vsr_table[(_vector_)] = (CYG_ADDRESS)(_vsr_); \
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CYG_MACRO_END
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// This is an ugly name, but what it means is: grab the VSR back to eCos
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// internal handling, or if you like, the default handler. But if
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// cooperating with GDB and CygMon, the default behaviour is to pass most
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// exceptions to CygMon. This macro undoes that so that eCos handles the
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// exception. So use it with care.
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externC void __default_exception_vsr(void);
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externC void __default_interrupt_vsr(void);
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#define HAL_VSR_SET_TO_ECOS_HANDLER( _vector_, _poldvsr_ ) \
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CYG_MACRO_START \
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HAL_VSR_SET( _vector_, _vector_ > CYGNUM_HAL_EXCEPTION_MAX \
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? (CYG_ADDRESS)__default_interrupt_vsr \
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: (CYG_ADDRESS)__default_exception_vsr, \
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_poldvsr_ ); \
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CYG_MACRO_END
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//---------------------------------------------------------------------------
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#endif // ifndef CYGONCE_HAL_HAL_INTR_H
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// End of hal_intr.h
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