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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [i386/] [arch/] [current/] [include/] [hal_smp.h] - Blame information for rev 838

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1 786 skrzyp
#ifndef CYGONCE_HAL_SMP_H
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#define CYGONCE_HAL_SMP_H
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//=============================================================================
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//
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//      hal_smp.h
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//
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//      SMP support
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):   nickg
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// Contributors:  nickg
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// Date:        2001-08-03
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// Purpose:     Define SMP support abstractions
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// Usage:       #include <cyg/hal/hal_smp.h>
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//              
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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#include <pkgconf/hal.h>
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#ifdef CYGPKG_HAL_SMP_SUPPORT
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#include <cyg/infra/cyg_type.h>
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#include <cyg/hal/hal_arch.h>
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//=============================================================================
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/*------------------------------------------------------------------------*/
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// APIC definitions
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#define HAL_APIC_ID         0x0020
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#define HAL_APIC_VER        0x0030
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#define HAL_APIC_TPR        0x0080
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#define HAL_APIC_EOI        0x00b0
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#define HAL_APIC_LDR        0x00d0
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#define HAL_APIC_DFR        0x00e0
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#define HAL_APIC_SPIV       0x00f0
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#define HAL_APIC_ISR        0x0100
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#define HAL_APIC_TMR        0x0180
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#define HAL_APIC_IRR        0x0200
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#define HAL_APIC_ICR_LO     0x0300
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#define HAL_APIC_ICR_HI     0x0310
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#define HAL_APIC_LVT_TIMER  0x0320
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#define HAL_APIC_LVT_PC     0x0340
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#define HAL_APIC_LVT_INT0   0x0350
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#define HAL_APIC_LVT_INT1   0x0360
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#define HAL_APIC_LVT_ERROR  0x0370
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#define      HAL_APIC_LVT_MASK      0x00010000
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/*------------------------------------------------------------------------*/
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// APIC access macros
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#define HAL_APIC_READ( __addr, __val )                                  \
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{                                                                       \
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    HAL_READMEM_UINT32(cyg_hal_smp_local_apic+(__addr), __val );        \
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}
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#define HAL_APIC_WRITE( __addr, __val )                                 \
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{                                                                       \
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    HAL_WRITEMEM_UINT32(cyg_hal_smp_local_apic+(__addr), __val );       \
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}
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/*------------------------------------------------------------------------*/
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// I/O APIC definitions
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#define HAL_IOAPIC_REGSEL           0x0000
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#define HAL_IOAPIC_REGWIN           0x0010
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#define HAL_IOAPIC_REG_APICID       0x0000
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#define HAL_IOAPIC_REG_APICVER      0x0001
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#define HAL_IOAPIC_REG_APICARB      0x0002
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#define HAL_IOAPIC_REG_REDTBL       0x0010
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#define HAL_IOAPIC_REG_REDIR_LO(n)  (HAL_IOAPIC_REG_REDTBL+((n)*2))
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#define HAL_IOAPIC_REG_REDIR_HI(n)  (HAL_IOAPIC_REG_REDTBL+((n)*2)+1)
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/*------------------------------------------------------------------------*/
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// I/O APIC access macros
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#define HAL_IOAPIC_READ( __reg, __val )                                 \
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{                                                                       \
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    HAL_WRITEMEM_UINT32( cyg_hal_smp_io_apic+HAL_IOAPIC_REGSEL, __reg );    \
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    HAL_READMEM_UINT32( cyg_hal_smp_io_apic+HAL_IOAPIC_REGWIN, __val );     \
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}
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#define HAL_IOAPIC_WRITE( __reg, __val )                                \
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{                                                                       \
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    HAL_WRITEMEM_UINT32( cyg_hal_smp_io_apic+HAL_IOAPIC_REGSEL, __reg );    \
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    HAL_WRITEMEM_UINT32( cyg_hal_smp_io_apic+HAL_IOAPIC_REGWIN, __val );    \
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}
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//-----------------------------------------------------------------------------
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// SMP configuration determined from platform during initialization
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__externC CYG_ADDRESS cyg_hal_smp_local_apic;
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__externC CYG_ADDRESS cyg_hal_smp_io_apic;
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__externC CYG_WORD32 cyg_hal_smp_cpu_count;
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__externC CYG_BYTE cyg_hal_smp_cpu_flags[CYGPKG_HAL_SMP_CPU_MAX];
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__externC CYG_BYTE cyg_hal_isa_bus_id;
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__externC CYG_BYTE cyg_hal_isa_bus_irq[16];
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__externC CYG_BYTE cyg_hal_pci_bus_id;
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__externC CYG_BYTE cyg_hal_pci_bus_irq[4];
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//-----------------------------------------------------------------------------
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// CPU numbering macros
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#define HAL_SMP_CPU_TYPE        cyg_uint32
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#define HAL_SMP_CPU_MAX         CYGPKG_HAL_SMP_CPU_MAX
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#define HAL_SMP_CPU_COUNT()     cyg_hal_smp_cpu_count
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#define HAL_SMP_CPU_THIS()                      \
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({                                              \
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    HAL_SMP_CPU_TYPE __id;                      \
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    HAL_APIC_READ( HAL_APIC_ID, __id );         \
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    (__id>>24)&0xF;                             \
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})
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#define HAL_SMP_CPU_NONE        (CYGPKG_HAL_SMP_CPU_MAX+1)
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//-----------------------------------------------------------------------------
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// CPU startup
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__externC void cyg_hal_cpu_release(HAL_SMP_CPU_TYPE cpu);
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#define HAL_SMP_CPU_START( __cpu ) cyg_hal_cpu_release( __cpu );
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#define HAL_SMP_CPU_RESCHEDULE_INTERRUPT( __cpu, __wait ) \
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        cyg_hal_cpu_message( __cpu, HAL_SMP_MESSAGE_RESCHEDULE, 0, __wait);
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#define HAL_SMP_CPU_TIMESLICE_INTERRUPT( __cpu, __wait ) \
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        cyg_hal_cpu_message( __cpu, HAL_SMP_MESSAGE_TIMESLICE, 0, __wait);
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//-----------------------------------------------------------------------------
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// CPU message exchange
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__externC void cyg_hal_cpu_message( HAL_SMP_CPU_TYPE cpu,
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                                    CYG_WORD32 msg,
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                                    CYG_WORD32 arg,
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                                    CYG_WORD32 wait);
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#define HAL_SMP_MESSAGE_TYPE            0xF0000000
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#define HAL_SMP_MESSAGE_ARG             (~HAL_SMP_MESSAGE_TYPE)
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#define HAL_SMP_MESSAGE_RESCHEDULE      0x10000000
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#define HAL_SMP_MESSAGE_MASK            0x20000000
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#define HAL_SMP_MESSAGE_UNMASK          0x30000000
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#define HAL_SMP_MESSAGE_REVECTOR        0x40000000
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#define HAL_SMP_MESSAGE_TIMESLICE       0x50000000
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//-----------------------------------------------------------------------------
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// Test-and-set support
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// These macros provide test-and-set support for the least significant bit
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// in a word. 
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#define HAL_TAS_TYPE    volatile CYG_WORD32
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#define HAL_TAS_SET( _tas_, _oldb_ )                    \
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CYG_MACRO_START                                         \
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{                                                       \
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    register CYG_WORD32 __old;                          \
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    __asm__ volatile (                                  \
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                       "lock btsl   $0,%1\n"            \
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                       "sbbl   %0,%0\n"                 \
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                       : "=r" (__old), "=m" (_tas_)     \
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                       :                                \
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                       : "memory"                       \
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                     );                                 \
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    _oldb_ = ( __old & 1 ) != 0;                        \
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}                                                       \
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CYG_MACRO_END
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#define HAL_TAS_CLEAR( _tas_, _oldb_ )                  \
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CYG_MACRO_START                                         \
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{                                                       \
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    register CYG_WORD32 __old;                          \
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    __asm__ volatile (                                  \
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                       "lock btrl   $0,%1\n"            \
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                       "sbbl   %0,%0\n"                 \
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                       : "=r" (__old), "=m" (_tas_)     \
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                       :                                \
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                       : "memory"                       \
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                     );                                 \
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    _oldb_ = ( __old & 1 ) != 0;                        \
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}                                                       \
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CYG_MACRO_END
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//-----------------------------------------------------------------------------
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// Spinlock support.
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// Built on top of test-and-set code.
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#define HAL_SPINLOCK_TYPE       volatile CYG_WORD32
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#define HAL_SPINLOCK_INIT_CLEAR 0
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#define HAL_SPINLOCK_INIT_SET   1
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#define HAL_SPINLOCK_SPIN( _lock_ )             \
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CYG_MACRO_START                                 \
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{                                               \
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    cyg_bool _val_;                             \
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    do                                          \
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    {                                           \
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        HAL_TAS_SET( _lock_, _val_ );           \
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    } while( _val_ );                           \
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}                                               \
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CYG_MACRO_END
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#define HAL_SPINLOCK_CLEAR( _lock_ )            \
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CYG_MACRO_START                                 \
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{                                               \
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    cyg_bool _val_;                             \
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    HAL_TAS_CLEAR( _lock_ , _val_ );            \
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}                                               \
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CYG_MACRO_END
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#define HAL_SPINLOCK_TRY( _lock_, _val_ )       \
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    HAL_TAS_SET( _lock_, _val_ );               \
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    (_val_) = (((_val_) & 1) == 0)
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#define HAL_SPINLOCK_TEST( _lock_, _val_ )      \
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    (_val_) = (((_lock_) & 1) != 0)
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//-----------------------------------------------------------------------------
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// Diagnostic output serialization
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__externC HAL_SPINLOCK_TYPE cyg_hal_smp_diag_lock;
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#define CYG_HAL_DIAG_LOCK_DATA_DEFN \
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        HAL_SPINLOCK_TYPE cyg_hal_smp_diag_lock = HAL_SPINLOCK_INIT_CLEAR
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#define CYG_HAL_DIAG_LOCK() HAL_SPINLOCK_SPIN( cyg_hal_smp_diag_lock )
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#define CYG_HAL_DIAG_UNLOCK() HAL_SPINLOCK_CLEAR( cyg_hal_smp_diag_lock )
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//-----------------------------------------------------------------------------
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// Some extra definitions
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__externC HAL_SPINLOCK_TYPE cyg_hal_ioapic_lock;
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//-----------------------------------------------------------------------------
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#endif // CYGPKG_HAL_SMP_SUPPORT
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//-----------------------------------------------------------------------------
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#endif // CYGONCE_HAL_SMP_H
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// End of hal_smp.h

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