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#ifndef CYGONCE_HAL_ARCH_H
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#define CYGONCE_HAL_ARCH_H
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//=============================================================================
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//
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// hal_arch.h
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//
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// Architecture specific abstractions
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 2003, 2006, 2008 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//####DESCRIPTIONBEGIN####
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//
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// Author(s): bartv
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// Date: 2003-06-04
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//####DESCRIPTIONEND####
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//=============================================================================
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#include <pkgconf/system.h>
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#include <pkgconf/hal.h>
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#include <pkgconf/hal_m68k.h>
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#include <cyg/infra/cyg_type.h>
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#include <cyg/hal/var_arch.h>
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// ----------------------------------------------------------------------------
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// The default IPL level for when interrupts are enabled. Usually this will
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// be set to 0, but on some platforms it may be appropriate to run with
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// a higher IPL level and effectively leave some interrupts disabled.
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#ifndef CYGNUM_HAL_INTERRUPT_DEFAULT_IPL_LEVEL
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# define CYGNUM_HAL_INTERRUPT_DEFAULT_IPL_LEVEL 0
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#endif
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// ----------------------------------------------------------------------------
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// setjmp/longjmp support. These only deal with the integer and fpu units.
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// If there are other hardware units then they are unlikely to be used
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// directly by the compiler, only by application code. Hence it is
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// application code that should decide whether or not each unit's state
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// should be preserved across setjmp/longjmp boundaries.
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//
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// Floating point registers have to be saved/restored here even if they
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// are not saved during a context switch, because we are concerned
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// about state within a single thread. The control and status registers
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// are saved as well, but fpiar can be ignored - setjmp() is not going
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// to happen while handling a floating point exception.
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//
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// The default implementation is in assembler and uses weak aliases. That
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// code has to be kept in step with this structure definition.
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#ifndef HAL_SETJMP
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#define HAL_SETJMP
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typedef struct {
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CYG_ADDRESS pc;
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CYG_ADDRESS sp;
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cyg_uint32 d[6]; // d2 to d7, d0 and d1 are caller-save
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CYG_ADDRESS a[5]; // a2 to a6, a0 and a1 are caller-save, a7 (sp) is separate
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#ifdef CYGINT_HAL_M68K_VARIANT_FPU
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long double f[6]; // f2 to f7, f0 and f1 are caller-save
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#endif
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} hal_jmp_buf_t;
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// This type is used by normal routines to pass the address of the
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// structure into our routines without having to explicitly take the
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// address of the structure.
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typedef cyg_uint32 hal_jmp_buf[sizeof(hal_jmp_buf_t) / sizeof(cyg_uint32)];
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externC int hal_m68k_setjmp(hal_jmp_buf);
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externC void hal_m68k_longjmp(hal_jmp_buf, int);
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#define hal_setjmp(_env) hal_m68k_setjmp(_env)
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#define hal_longjmp(_env, _val) hal_m68k_longjmp(_env, _val)
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#endif // HAL_SETJMP
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// ----------------------------------------------------------------------------
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// Thread context support. The implementation is in assembler functions
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// rather than inline macros. That makes it easier to cope with
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// hardware-specific units which have their own context.
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//
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// A thread context consists of an integer part, a floating point part
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// (iff the hardware has a standard FPU and if the configuration makes
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// FPU context part of the save state), and OTHER for extra hardware
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// units.
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#define HAL_M68K_SR_C (0x01 << 0)
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#define HAL_M68K_SR_V (0x01 << 1)
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#define HAL_M68K_SR_Z (0x01 << 2)
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#define HAL_M68K_SR_N (0x01 << 3)
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#define HAL_M68K_SR_X (0x01 << 4)
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#define HAL_M68K_SR_S (0x01 << 13)
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#define HAL_M68K_SR_T (0x01 << 15)
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#define HAL_M68K_SR_IPL_MASK (0x07 << 8)
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#define HAL_M68K_SR_IPL_SHIFT 8
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typedef struct {
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// The integer context, d0-d7,a0-a6
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cyg_uint32 da[15];
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// FPU context. This is only relevant if the hardware has an FPU,
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// and then only if the configuration makes the FPU context part
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// of the save state.
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#ifdef CYGIMP_HAL_M68K_FPU_SAVE
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cyg_uint32 fpsr;
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CYG_ADDRESS fpiar;
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long double f[8];
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#endif
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// Some m68k variants may have additional state that should be part
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// of a thread context.
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#ifdef HAL_CONTEXT_OTHER
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HAL_CONTEXT_OTHER
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#endif
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// Program counter, status register, etc. The exact layout is
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// determined by the variant. The intention is that the structure
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// matches the state pushed onto the stack by the hardware when an
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// interrupt occurs, so the context can overlap this part of the
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// stack. That avoids having to copy the saved PC and SR registers
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// from the stack into the context structure. The final step of
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// a context switch is an rte instruction.
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HAL_CONTEXT_PCSR
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} HAL_SavedRegisters;
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#define HAL_CONTEXT_INTEGER_SIZE (15 * 4)
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#ifdef CYGIMP_HAL_M68K_FPU_SAVE
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# define HAL_CONTEXT_FPU_SIZE ((2 * 4) + (8 * 12))
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#else
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# define HAL_CONTEXT_FPU_SIZE 0
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#endif
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#ifndef HAL_CONTEXT_OTHER_SIZE
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# define HAL_CONTEXT_OTHER_SIZE 0
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#endif
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#ifndef HAL_CONTEXT_PCSR_SIZE
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# define HAL_CONTEXT_PCSR_SIZE 8
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#endif
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#define HAL_CONTEXT_FULL_SIZE (HAL_CONTEXT_INTEGER_SIZE + HAL_CONTEXT_FPU_SIZE + HAL_CONTEXT_OTHER_SIZE + HAL_CONTEXT_PCSR_SIZE)
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// Load and switch are handled by functions in hal_arch.S. One level
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// of indirection is removed here for the destination thread, so that
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// the actual stack pointer gets passed to assembler.
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externC void hal_thread_load_context(CYG_ADDRESS) CYGBLD_ATTRIB_NORET;
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externC void hal_thread_switch_context(CYG_ADDRESS, CYG_ADDRESS);
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#define HAL_THREAD_LOAD_CONTEXT(_to_) \
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CYG_MACRO_START \
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hal_thread_load_context((CYG_ADDRESS) *(_to_)); \
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CYG_MACRO_END
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#define HAL_THREAD_SWITCH_CONTEXT(_from_, _to_) \
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CYG_MACRO_START \
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hal_thread_switch_context((CYG_ADDRESS)(_from_), (CYG_ADDRESS)*(_to_)); \
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CYG_MACRO_END
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// Init context can be done easily in C.
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//
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// LOAD_CONTEXT and SWITCH_CONTEXT will end up doing an rte, so at the top
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// of the stack we want the SR, return PC, a dummy PC for the entry point's
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// stack frame, and the argument to the function.
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//
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// +----------------+
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// | _thread_ arg |
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// +----------------+
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// | return PC |
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// +----------------+
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// | _entry_ PC |
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// +- - - - - - - - +
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// | SR |
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// SP ----> +- - - - - - - - +
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// | HAL |
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// | SavedRegisters |
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// | |
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//
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// FPU and OTHER contexts are handled by macros which may or may not expand.
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//
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// The PC/SR fields are handled by variant-specific code.
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#ifdef CYGIMP_HAL_M68K_FPU_SAVE
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# define HAL_CONTEXT_FPU_INIT(_regs_) \
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CYG_MACRO_START \
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int _j_; \
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(_regs_)->fpsr = 0; \
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(_regs_)->fpiar = 0; \
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for (_j_ = 0; _j_ < 8; _j_++) { \
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(_regs_)->f[_j_] = 0.0; \
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} \
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CYG_MACRO_END
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#else
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# define HAL_CONTEXT_FPU_INIT(_regs_)
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#endif
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#ifndef HAL_CONTEXT_OTHER_INIT
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# define HAL_CONTEXT_OTHER_INIT(_regs_)
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#endif
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// Only initialize with ints enabled if CYGPKG_KERNEL. RedBoot does a
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// LoadContext, causing interrupts to be enabled prematurely.
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#ifdef CYGPKG_KERNEL
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# define _HAL_M68K_INIT_CONTEXT_SR_ (0x2000 | (CYGNUM_HAL_INTERRUPT_DEFAULT_IPL_LEVEL<<8))
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#else
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# define _HAL_M68K_INIT_CONTEXT_SR_ (0x2700)
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#endif
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#define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_) \
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CYG_MACRO_START \
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cyg_uint32* _sp_ = ((cyg_uint32*) ((cyg_uint32)(_sparg_) & ~(CYGARC_ALIGNMENT - 1))); \
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HAL_SavedRegisters* _regs_; \
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int _i_; \
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*(--_sp_) = (cyg_uint32)(_thread_); \
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*(--_sp_) = 0xDEADC0DE; \
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_regs_ = (HAL_SavedRegisters*) ((cyg_uint32)_sp_ - sizeof(HAL_SavedRegisters)); \
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for (_i_ = 0; _i_ < 14; _i_++) { \
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_regs_->da[_i_] = _id_; \
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} \
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_regs_->da[14] = 0; \
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HAL_CONTEXT_FPU_INIT(_regs_) \
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HAL_CONTEXT_OTHER_INIT(_regs_) \
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HAL_CONTEXT_PCSR_INIT(_regs_, _entry_, _HAL_M68K_INIT_CONTEXT_SR_); \
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(_sparg_) = (CYG_ADDRESS) (_regs_); \
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CYG_MACRO_END
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// ----------------------------------------------------------------------------
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// Minimal and sensible stack sizes: the intention is that applications
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// will use these to provide a stack size in the first instance prior to
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// proper analysis. Idle thread stack should be this big.
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//
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// THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES.
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// THEY ARE HOWEVER ENOUGH TO START PROGRAMMING.
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// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES!
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//
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// This is not a config option because it should not be adjusted except
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// under "enough rope" sort of disclaimers.
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// Stack frame overhead per call. 6 data registers, 5 address
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// registers, frame pointer, and return address. We can't guess the
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// local variables so just assume that using all of the registers
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// averages out.
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# define CYGNUM_HAL_STACK_FRAME_SIZE ((6 + 5 + 1 + 1) * 4)
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// Stack needed for a context switch. Allow for sr and vector as well.
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#ifndef CYGNUM_HAL_STACK_CONTEXT_SIZE
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# define CYGNUM_HAL_STACK_CONTEXT_SIZE HAL_CONTEXT_FULL_SIZE
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#endif
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// Interrupt handling. These need to allow for nesting and a
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// separate interrupt stack.
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#ifndef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
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# ifndef CYGSEM_HAL_COMMON_INTERRUPTS_ALLOW_NESTING
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// No interrupt stack, no nesting. Worst case: a saved context, a
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// frame for the interrupt_end() call, six frames for DSR processing,
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// another saved context for an interrupt during the DSRs, and
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// six frames for the ISR.
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# define CYGNUM_HAL_STACK_INTERRUPT_SIZE ((2 * CYGNUM_HAL_STACK_CONTEXT_SIZE) + (13 * CYGNUM_HAL_STACK_FRAME_SIZE))
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# else
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// No interrupt stack but nesting. Worst case: a saved context,
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// a frame for interrupt_end(), six frames for DSR processing, then
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// up to five higher priority interrupts each requiring a context
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// and six frames.
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# define CYGNUM_HAL_STACK_INTERRUPT_SIZE ((6 * CYGNUM_HAL_STACK_CONTEXT_SIZE) + (37 * CYGNUM_HAL_STACK_FRAME_SIZE))
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# endif
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#else
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# ifndef CYGSEM_HAL_COMMON_INTERRUPTS_ALLOW_NESTING
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// An interrupt stack but no nesting. Worst case: a saved context,
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// a frame for interrupt_end(), and another saved context. There
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// is no need to worry about ISR or DSR frames since those will
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// be on the interrupt stack. We also need to allow for nested
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// interrupts before these are disabled, which will involve only
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// 2 words rather than a full stack.
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# define CYGNUM_HAL_STACK_INTERRUPT_SIZE ((2 * CYGNUM_HAL_STACK_CONTEXT_SIZE) + (1 * CYGNUM_HAL_STACK_FRAME_SIZE) + (5 * 2 * 4))
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# else
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// An interrupt stack and nesting. We need to allow for another five
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// nested contexts because nested interrupts may happen after pushing
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// the current context but before switching to the interrupt stack.
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# define CYGNUM_HAL_STACK_INTERRUPT_SIZE ((7 * CYGNUM_HAL_STACK_CONTEXT_SIZE) + (1 * CYGNUM_HAL_STACK_FRAME_SIZE))
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# endif
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#endif
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// We define a minimum stack size as the minimum any thread could ever
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// legitimately get away with. We can throw asserts if users ask for
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// less than this. This allows for a saved context for context switching
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// plus eight stack frames for cals, in addition to the interrupt overhead.
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#define CYGNUM_HAL_STACK_SIZE_MINIMUM (CYGNUM_HAL_STACK_INTERRUPT_SIZE + CYGNUM_HAL_STACK_CONTEXT_SIZE + (8 * CYGNUM_HAL_STACK_FRAME_SIZE))
|
321 |
|
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|
322 |
|
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// Now make a reasonable choice for a typical thread size. Allow for
|
323 |
|
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// another 8 call frames and a K for on-stack buffers, printf(),
|
324 |
|
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// and debugging overheads.
|
325 |
|
|
#define CYGNUM_HAL_STACK_SIZE_TYPICAL (CYGNUM_HAL_STACK_SIZE_MINIMUM + (8 * CYGNUM_HAL_STACK_FRAME_SIZE) + 1024)
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326 |
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|
327 |
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// -----------------------------------------------------------------------------
|
328 |
|
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// Bit manipulation routines. The vanilla 68000 has no special
|
329 |
|
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// instructions for this so assembler implementations are used
|
330 |
|
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// instead. Newer ColdFires do have suitable instructions so will
|
331 |
|
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// define their own versions of these macro.
|
332 |
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|
333 |
|
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#ifndef HAL_LSBIT_INDEX
|
334 |
|
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externC cyg_uint32 hal_lsbit_index(cyg_uint32 mask);
|
335 |
|
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#define HAL_LSBIT_INDEX(index, mask) (index) = hal_lsbit_index(mask);
|
336 |
|
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#endif
|
337 |
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#ifndef HAL_MSBIT_INDEX
|
338 |
|
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externC cyg_uint32 hal_msbit_index(cyg_uint32 mask);
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339 |
|
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#define HAL_MSBIT_INDEX(index, mask) (index) = hal_msbit_index(mask);
|
340 |
|
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#endif
|
341 |
|
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|
342 |
|
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// There are some useful bit-set and bit-clear instructions which allow
|
343 |
|
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// for atomic updates of a single byte of memory.
|
344 |
|
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#define HAL_M68K_BSET(_address_, _bit_) \
|
345 |
|
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CYG_MACRO_START \
|
346 |
|
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asm volatile("bset %0,(%1)\n" : : "i" (_bit_), "a" (_address_) : "cc", "memory"); \
|
347 |
|
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CYG_MACRO_END
|
348 |
|
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|
349 |
|
|
#define HAL_M68K_BCLR(_address_, _bit_) \
|
350 |
|
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CYG_MACRO_START \
|
351 |
|
|
asm volatile("bclr %0,(%1)\n" : : "i" (_bit_), "a" (_address_) : "cc", "memory"); \
|
352 |
|
|
CYG_MACRO_END
|
353 |
|
|
|
354 |
|
|
//-----------------------------------------------------------------------------
|
355 |
|
|
// Idle thread code. A plain 68000 has no special support, so a no-op
|
356 |
|
|
// function is used. Variants may use this to go into sleep mode.
|
357 |
|
|
|
358 |
|
|
#ifndef HAL_IDLE_THREAD_ACTION
|
359 |
|
|
# define HAL_IDLE_THREAD_ACTION(_count_) CYG_EMPTY_STATEMENT
|
360 |
|
|
#endif
|
361 |
|
|
|
362 |
|
|
//-----------------------------------------------------------------------------
|
363 |
|
|
// Execution reorder barrier.
|
364 |
|
|
// When optimizing the compiler can reorder code. In multithreaded systems
|
365 |
|
|
// where the order of actions is vital, this can sometimes cause problems.
|
366 |
|
|
// This macro may be inserted into places where reordering should not happen.
|
367 |
|
|
|
368 |
|
|
#define HAL_REORDER_BARRIER() __asm__ volatile ( "" : : : "memory" )
|
369 |
|
|
|
370 |
|
|
//--------------------------------------------------------------------------
|
371 |
|
|
// Macros for switching context between two eCos instances (jump from
|
372 |
|
|
// code in ROM to code in RAM or vice versa). The 68000 does not have any
|
373 |
|
|
// relevant global state so these macros are no-ops.
|
374 |
|
|
|
375 |
|
|
#define CYGARC_HAL_SAVE_GP()
|
376 |
|
|
#define CYGARC_HAL_RESTORE_GP()
|
377 |
|
|
|
378 |
|
|
//-----------------------------------------------------------------------------
|
379 |
|
|
// gdb support
|
380 |
|
|
|
381 |
|
|
// Translate a stack pointer as saved by the thread context macros
|
382 |
|
|
// into a pointer to a HAL_SavedRegisters structure. On the 68K
|
383 |
|
|
// these are equivalent.
|
384 |
|
|
#define HAL_THREAD_GET_SAVED_REGISTERS(_stack_, _regs_) \
|
385 |
|
|
CYG_MACRO_START \
|
386 |
|
|
(_regs_) = (HAL_SavedRegisters*)(_stack_); \
|
387 |
|
|
CYG_MACRO_END
|
388 |
|
|
|
389 |
|
|
// Translate between an eCos context and a gdb register set.
|
390 |
|
|
externC void hal_get_gdb_registers(CYG_ADDRWORD*, HAL_SavedRegisters*);
|
391 |
|
|
externC void hal_set_gdb_registers(HAL_SavedRegisters*, CYG_ADDRWORD*);
|
392 |
|
|
|
393 |
|
|
#define HAL_GET_GDB_REGISTERS(_regval_, _regs_) \
|
394 |
|
|
CYG_MACRO_START \
|
395 |
|
|
hal_get_gdb_registers((CYG_ADDRWORD*)(_regval_), (HAL_SavedRegisters*)(_regs_)); \
|
396 |
|
|
CYG_MACRO_END
|
397 |
|
|
|
398 |
|
|
#define HAL_SET_GDB_REGISTERS(_regs_,_regval_) \
|
399 |
|
|
CYG_MACRO_START \
|
400 |
|
|
hal_set_gdb_registers((HAL_SavedRegisters*)(_regs_), (CYG_ADDRWORD*)(_regval_)); \
|
401 |
|
|
CYG_MACRO_END
|
402 |
|
|
|
403 |
|
|
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
|
404 |
|
|
|
405 |
|
|
// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to happen
|
406 |
|
|
// if executed.
|
407 |
|
|
// HAL_BREAKINST is the value of the breakpoint instruction and
|
408 |
|
|
// HAL_BREAKINST_SIZE is its size in bytes.
|
409 |
|
|
|
410 |
|
|
#define HAL_BREAKPOINT(_label_) \
|
411 |
|
|
__asm__ volatile (" .globl " #_label_ ";" \
|
412 |
|
|
#_label_":" \
|
413 |
|
|
" trap #15" \
|
414 |
|
|
);
|
415 |
|
|
|
416 |
|
|
#define HAL_BREAKINST 0x4E4F
|
417 |
|
|
|
418 |
|
|
#define HAL_BREAKINST_SIZE 2
|
419 |
|
|
|
420 |
|
|
// The GDB register definitions. as per gdb/m68k-stub.c
|
421 |
|
|
// FIXME: more work is needed for floating point support.
|
422 |
|
|
enum regnames {
|
423 |
|
|
D0, D1, D2, D3, D4, D5, D6, D7,
|
424 |
|
|
A0, A1, A2, A3, A4, A5, FP, SP,
|
425 |
|
|
PS, PC,
|
426 |
|
|
#ifdef CYGINT_HAL_M68K_VARIANT_FPU
|
427 |
|
|
FP0, FP1, FP2, FP3, FP4, FP5, FP6, FP7,
|
428 |
|
|
FPCONTROL, FPSTATUS, FPIADDR
|
429 |
|
|
#endif
|
430 |
|
|
};
|
431 |
|
|
|
432 |
|
|
#ifdef CYGINT_HAL_M68K_VARIANT_FPU
|
433 |
|
|
# define NUMREGS 29
|
434 |
|
|
#else
|
435 |
|
|
# define NUMREGS 18
|
436 |
|
|
#endif
|
437 |
|
|
|
438 |
|
|
#define REGSIZE(_x_) (4)
|
439 |
|
|
|
440 |
|
|
typedef enum regnames regnames_t;
|
441 |
|
|
typedef CYG_ADDRWORD target_register_t;
|
442 |
|
|
|
443 |
|
|
externC int __computeSignal(unsigned int trap_number);
|
444 |
|
|
externC int __get_trap_number(void);
|
445 |
|
|
externC void __install_breakpoints(void);
|
446 |
|
|
externC void __clear_breakpoints(void);
|
447 |
|
|
externC void __single_step(void);
|
448 |
|
|
externC void __clear_single_step(void);
|
449 |
|
|
externC void __skipinst(void);
|
450 |
|
|
externC int __is_breakpoint_function(void);
|
451 |
|
|
externC void set_pc(target_register_t);
|
452 |
|
|
|
453 |
|
|
#define HAL_STUB_PLATFORM_STUBS_FIXUP() \
|
454 |
|
|
CYG_MACRO_START \
|
455 |
|
|
if (CYGNUM_HAL_VECTOR_TRAP15 == __get_trap_number()) \
|
456 |
|
|
put_register(PC, get_register(PC) - 2); \
|
457 |
|
|
CYG_MACRO_END
|
458 |
|
|
|
459 |
|
|
#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
|
460 |
|
|
|
461 |
|
|
//-----------------------------------------------------------------------------
|
462 |
|
|
// Exception handling function.
|
463 |
|
|
// This function is defined by the kernel according to this prototype. It is
|
464 |
|
|
// invoked from the HAL to deal with any CPU exceptions that the HAL does
|
465 |
|
|
// not want to deal with itself. It usually invokes the kernel's exception
|
466 |
|
|
// delivery mechanism.
|
467 |
|
|
#if defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) && defined(CYGPKG_HAL_EXCEPTIONS)
|
468 |
|
|
externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data );
|
469 |
|
|
#endif
|
470 |
|
|
|
471 |
|
|
//-----------------------------------------------------------------------------
|
472 |
|
|
#endif // CYGONCE_HAL_ARCH_H
|
473 |
|
|
// End of hal_arch.h
|
474 |
|
|
|