1 |
786 |
skrzyp |
#ifndef CYGONCE_HAL_HAL_INTR_H
|
2 |
|
|
#define CYGONCE_HAL_HAL_INTR_H
|
3 |
|
|
|
4 |
|
|
//==========================================================================
|
5 |
|
|
//
|
6 |
|
|
// hal_intr.h
|
7 |
|
|
//
|
8 |
|
|
// m68k Interrupt and clock support
|
9 |
|
|
//
|
10 |
|
|
//==========================================================================
|
11 |
|
|
// ####ECOSGPLCOPYRIGHTBEGIN####
|
12 |
|
|
// -------------------------------------------
|
13 |
|
|
// This file is part of eCos, the Embedded Configurable Operating System.
|
14 |
|
|
// Copyright (C) 2003, 2006, 2008 Free Software Foundation, Inc.
|
15 |
|
|
//
|
16 |
|
|
// eCos is free software; you can redistribute it and/or modify it under
|
17 |
|
|
// the terms of the GNU General Public License as published by the Free
|
18 |
|
|
// Software Foundation; either version 2 or (at your option) any later
|
19 |
|
|
// version.
|
20 |
|
|
//
|
21 |
|
|
// eCos is distributed in the hope that it will be useful, but WITHOUT
|
22 |
|
|
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
23 |
|
|
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
24 |
|
|
// for more details.
|
25 |
|
|
//
|
26 |
|
|
// You should have received a copy of the GNU General Public License
|
27 |
|
|
// along with eCos; if not, write to the Free Software Foundation, Inc.,
|
28 |
|
|
// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
|
29 |
|
|
//
|
30 |
|
|
// As a special exception, if other files instantiate templates or use
|
31 |
|
|
// macros or inline functions from this file, or you compile this file
|
32 |
|
|
// and link it with other works to produce a work based on this file,
|
33 |
|
|
// this file does not by itself cause the resulting work to be covered by
|
34 |
|
|
// the GNU General Public License. However the source code for this file
|
35 |
|
|
// must still be made available in accordance with section (3) of the GNU
|
36 |
|
|
// General Public License v2.
|
37 |
|
|
//
|
38 |
|
|
// This exception does not invalidate any other reasons why a work based
|
39 |
|
|
// on this file might be covered by the GNU General Public License.
|
40 |
|
|
// -------------------------------------------
|
41 |
|
|
// ####ECOSGPLCOPYRIGHTEND####
|
42 |
|
|
//==========================================================================
|
43 |
|
|
//####DESCRIPTIONBEGIN####
|
44 |
|
|
//
|
45 |
|
|
// Author(s): bartv
|
46 |
|
|
// Date: 2003-06-04
|
47 |
|
|
//####DESCRIPTIONEND####
|
48 |
|
|
//=============================================================================
|
49 |
|
|
|
50 |
|
|
#include <pkgconf/hal.h>
|
51 |
|
|
#include <cyg/infra/cyg_type.h>
|
52 |
|
|
#include <cyg/infra/cyg_ass.h>
|
53 |
|
|
#include <cyg/hal/hal_arch.h>
|
54 |
|
|
|
55 |
|
|
// Allow variants to override some of these settings.
|
56 |
|
|
#include <cyg/hal/var_intr.h>
|
57 |
|
|
|
58 |
|
|
//--------------------------------------------------------------------------
|
59 |
|
|
// m68k exception vectors. These correspond to VSRs and are the values
|
60 |
|
|
// to use for HAL_VSR_GET/SET
|
61 |
|
|
|
62 |
|
|
extern CYG_ADDRESS hal_m68k_vsr_table[];
|
63 |
|
|
|
64 |
|
|
#ifndef HAL_VSR_GET
|
65 |
|
|
# define HAL_VSR_GET( _vector_, _pvsr_ ) \
|
66 |
|
|
CYG_MACRO_START \
|
67 |
|
|
*((CYG_ADDRESS *)(_pvsr_)) = hal_m68k_vsr_table[(_vector_)]; \
|
68 |
|
|
CYG_MACRO_END
|
69 |
|
|
#endif
|
70 |
|
|
|
71 |
|
|
#if !defined(HAL_VSR_SET) && !defined(_HAL_M68K_NO_VSR_SET_)
|
72 |
|
|
# define HAL_VSR_SET( _vector_arg_, _vsr_, _poldvsr_arg_ ) \
|
73 |
|
|
CYG_MACRO_START \
|
74 |
|
|
cyg_uint32 _vector_ = (cyg_uint32) (_vector_arg_); \
|
75 |
|
|
CYG_ADDRESS* _poldvsr_ = (CYG_ADDRESS*)(_poldvsr_arg_); \
|
76 |
|
|
if(_poldvsr_ != (CYG_ADDRESS*)0 ) \
|
77 |
|
|
*_poldvsr_ = hal_m68k_vsr_table[(_vector_)]; \
|
78 |
|
|
hal_m68k_vsr_table[(_vector_)] = (CYG_ADDRESS)(_vsr_); \
|
79 |
|
|
CYG_MACRO_END
|
80 |
|
|
#endif
|
81 |
|
|
|
82 |
|
|
#define CYGNUM_HAL_VECTOR_SSP 0
|
83 |
|
|
#define CYGNUM_HAL_VECTOR_RESET 1
|
84 |
|
|
#define CYGNUM_HAL_VECTOR_BUSERR 2
|
85 |
|
|
#define CYGNUM_HAL_VECTOR_ADDERR 3
|
86 |
|
|
#define CYGNUM_HAL_VECTOR_ILLINST 4
|
87 |
|
|
#define CYGNUM_HAL_VECTOR_ZERODIV 5
|
88 |
|
|
#define CYGNUM_HAL_VECTOR_CHKINST 6
|
89 |
|
|
#define CYGNUM_HAL_VECTOR_TRAPVINST 7
|
90 |
|
|
#define CYGNUM_HAL_VECTOR_PRIVVIOLATION 8
|
91 |
|
|
#define CYGNUM_HAL_VECTOR_TRACE 9
|
92 |
|
|
#define CYGNUM_HAL_VECTOR_L1010 10
|
93 |
|
|
// 12-14 are reserved
|
94 |
|
|
#define CYGNUM_HAL_VECTOR_L1111 11
|
95 |
|
|
#define CYGNUM_HAL_VECTOR_UNINITINT 15
|
96 |
|
|
// 16-23 are reserved
|
97 |
|
|
#define CYGNUM_HAL_VECTOR_SPURINT 24
|
98 |
|
|
#define CYGNUM_HAL_VECTOR_AUTOVEC1 25
|
99 |
|
|
#define CYGNUM_HAL_VECTOR_AUTOVEC2 26
|
100 |
|
|
#define CYGNUM_HAL_VECTOR_AUTOVEC3 27
|
101 |
|
|
#define CYGNUM_HAL_VECTOR_AUTOVEC4 28
|
102 |
|
|
#define CYGNUM_HAL_VECTOR_AUTOVEC5 29
|
103 |
|
|
#define CYGNUM_HAL_VECTOR_AUTOVEC6 30
|
104 |
|
|
#define CYGNUM_HAL_VECTOR_AUTOVEC7 31
|
105 |
|
|
#define CYGNUM_HAL_VECTOR_NMI CYGNUM_HAL_VECTOR_AUTOVEC7
|
106 |
|
|
#define CYGNUM_HAL_VECTOR_TRAP0 32
|
107 |
|
|
#define CYGNUM_HAL_VECTOR_TRAPFIRST 32
|
108 |
|
|
#define CYGNUM_HAL_VECTOR_TRAP1 33
|
109 |
|
|
#define CYGNUM_HAL_VECTOR_TRAP2 34
|
110 |
|
|
#define CYGNUM_HAL_VECTOR_TRAP3 35
|
111 |
|
|
#define CYGNUM_HAL_VECTOR_TRAP4 36
|
112 |
|
|
#define CYGNUM_HAL_VECTOR_TRAP5 37
|
113 |
|
|
#define CYGNUM_HAL_VECTOR_TRAP6 38
|
114 |
|
|
#define CYGNUM_HAL_VECTOR_TRAP7 39
|
115 |
|
|
#define CYGNUM_HAL_VECTOR_TRAP8 40
|
116 |
|
|
#define CYGNUM_HAL_VECTOR_TRAP9 41
|
117 |
|
|
#define CYGNUM_HAL_VECTOR_TRAP10 42
|
118 |
|
|
#define CYGNUM_HAL_VECTOR_TRAP11 43
|
119 |
|
|
#define CYGNUM_HAL_VECTOR_TRAP12 44
|
120 |
|
|
#define CYGNUM_HAL_VECTOR_TRAP13 45
|
121 |
|
|
#define CYGNUM_HAL_VECTOR_TRAP14 46
|
122 |
|
|
/* TRAP15 is used by gdb stubs */
|
123 |
|
|
#define CYGNUM_HAL_VECTOR_TRAP15 47
|
124 |
|
|
#define CYGNUM_HAL_VECTOR_TRAPLAST CYGNUM_HAL_VECTOR_TRAP15
|
125 |
|
|
#define CYGNUM_HAL_VECTOR_NUMTRAPS 16
|
126 |
|
|
// 48-63 are reserved
|
127 |
|
|
#define CYGNUM_HAL_VECTOR_INTRFIRST 64
|
128 |
|
|
#define CYGNUM_HAL_VECTOR_NUMINTRS 192
|
129 |
|
|
#define CYGNUM_HAL_VECTOR_INTRLAST (CYGNUM_HAL_VECTOR_INTRFIRST+CYGNUM_HAL_VECTOR_NUMINTRS-1)
|
130 |
|
|
|
131 |
|
|
#define CYGNUM_HAL_VSR_MIN CYGNUM_HAL_VECTOR_SSP
|
132 |
|
|
#define CYGNUM_HAL_VSR_MAX CYGNUM_HAL_VECTOR_INTRLAST
|
133 |
|
|
#define CYGNUM_HAL_VSR_COUNT (CYGNUM_HAL_VSR_MAX+1)
|
134 |
|
|
|
135 |
|
|
// ----------------------------------------------------------------------------
|
136 |
|
|
// Also give details of the defined exceptions. Only some of the exceptions
|
137 |
|
|
// are named explicitly here.
|
138 |
|
|
// NOTE: FPU exceptions should be added
|
139 |
|
|
|
140 |
|
|
#define CYGNUM_HAL_EXCEPTION_DATA_ACCESS CYGNUM_HAL_VECTOR_BUSERR
|
141 |
|
|
#define CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS CYGNUM_HAL_VECTOR_ADDERR
|
142 |
|
|
#define CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION CYGNUM_HAL_VECTOR_ILLINST
|
143 |
|
|
#define CYGNUM_HAL_EXCEPTION_DIV_BY_ZERO CYGNUM_HAL_VECTOR_ZERODIV
|
144 |
|
|
#define CYGNUM_HAL_EXCEPTION_SYSTEM_ERROR CYGNUM_HAL_VECTOR_CHKINST
|
145 |
|
|
#define CYGNUM_HAL_EXCEPTION_TRACE CYGNUM_HAL_VECTOR_TRACE
|
146 |
|
|
#define CYGNUM_HAL_EXCEPTION_INSTRUCTION_BP CYGNUM_HAL_VECTOR_TRAP15
|
147 |
|
|
|
148 |
|
|
#ifndef CYGNUM_HAL_EXCEPTION_COUNT
|
149 |
|
|
# define CYGNUM_HAL_EXCEPTION_MIN CYGNUM_HAL_VECTOR_BUSERR
|
150 |
|
|
# define CYGNUM_HAL_EXCEPTION_MAX CYGNUM_HAL_VECTOR_TRAPLAST
|
151 |
|
|
# define CYGNUM_HAL_EXCEPTION_COUNT ((CYGNUM_HAL_EXCEPTION_MAX-CYGNUM_HAL_EXCEPTION_MIN)+1)
|
152 |
|
|
#endif
|
153 |
|
|
|
154 |
|
|
//--------------------------------------------------------------------------
|
155 |
|
|
// ISR vectors.
|
156 |
|
|
|
157 |
|
|
#ifndef CYGNUM_HAL_ISR_COUNT
|
158 |
|
|
# error The variant or platform HAL should provide details of ISR vectors.
|
159 |
|
|
#endif
|
160 |
|
|
|
161 |
|
|
// Default definition of HAL_TRANSLATE_VECTOR()
|
162 |
|
|
#ifndef HAL_TRANSLATE_VECTOR
|
163 |
|
|
# define HAL_TRANSLATE_VECTOR(_vector_, _index_) \
|
164 |
|
|
((_index_) = ((_vector_) - CYGNUM_HAL_ISR_MIN))
|
165 |
|
|
#endif
|
166 |
|
|
|
167 |
|
|
externC volatile CYG_ADDRESS cyg_hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT];
|
168 |
|
|
externC volatile CYG_ADDRWORD cyg_hal_interrupt_data[CYGNUM_HAL_ISR_COUNT];
|
169 |
|
|
externC volatile CYG_ADDRESS cyg_hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT];
|
170 |
|
|
externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data);
|
171 |
|
|
// For consistency with other architectures.
|
172 |
|
|
#define hal_interrupt_handlers cyg_hal_interrupt_handlers
|
173 |
|
|
|
174 |
|
|
#ifndef HAL_INTERRUPT_IN_USE
|
175 |
|
|
# define HAL_INTERRUPT_IN_USE( _vector_, _state_) \
|
176 |
|
|
CYG_MACRO_START \
|
177 |
|
|
if (cyg_hal_interrupt_handlers[(_vector_)] ==(CYG_ADDRESS)&hal_default_isr) \
|
178 |
|
|
(_state_) = 0; \
|
179 |
|
|
else \
|
180 |
|
|
(_state_) = 1; \
|
181 |
|
|
CYG_MACRO_END
|
182 |
|
|
#endif
|
183 |
|
|
|
184 |
|
|
#ifndef HAL_INTERRUPT_ATTACH
|
185 |
|
|
# define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \
|
186 |
|
|
CYG_MACRO_START \
|
187 |
|
|
cyg_hal_interrupt_handlers[(_vector_)] = (CYG_ADDRESS)(_isr_); \
|
188 |
|
|
cyg_hal_interrupt_data[(_vector_)] = (CYG_ADDRWORD)(_data_); \
|
189 |
|
|
cyg_hal_interrupt_objects[(_vector_)] = (CYG_ADDRESS)(_object_); \
|
190 |
|
|
CYG_MACRO_END
|
191 |
|
|
#endif
|
192 |
|
|
|
193 |
|
|
#ifndef HAL_INTERRUPT_DETACH
|
194 |
|
|
# define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) \
|
195 |
|
|
CYG_MACRO_START \
|
196 |
|
|
if (cyg_hal_interrupt_handlers[(_vector_)] == (CYG_ADDRESS)(_isr_)) { \
|
197 |
|
|
cyg_hal_interrupt_handlers[(_vector_)] = (CYG_ADDRESS)&hal_default_isr; \
|
198 |
|
|
cyg_hal_interrupt_data[(_vector_)] = 0; \
|
199 |
|
|
cyg_hal_interrupt_objects[(_vector_)] = 0; \
|
200 |
|
|
} \
|
201 |
|
|
CYG_MACRO_END
|
202 |
|
|
#endif
|
203 |
|
|
|
204 |
|
|
//--------------------------------------------------------------------------
|
205 |
|
|
// Interrupt control macros. These just operate on the entire status
|
206 |
|
|
// register.
|
207 |
|
|
|
208 |
|
|
typedef cyg_uint16 CYG_INTERRUPT_STATE;
|
209 |
|
|
|
210 |
|
|
#ifndef HAL_ENABLE_INTERRUPTS
|
211 |
|
|
# define HAL_ENABLE_INTERRUPTS() \
|
212 |
|
|
CYG_MACRO_START \
|
213 |
|
|
asm volatile ("move.w %0,%%sr\n" \
|
214 |
|
|
: \
|
215 |
|
|
: "J" (0x2000 | (CYGNUM_HAL_INTERRUPT_DEFAULT_IPL_LEVEL << 8)) \
|
216 |
|
|
: "cc"); \
|
217 |
|
|
CYG_MACRO_END
|
218 |
|
|
#endif // HAL_ENABLE_INTERRUPTS
|
219 |
|
|
|
220 |
|
|
#ifndef HAL_DISABLE_INTERRUPTS
|
221 |
|
|
# define HAL_DISABLE_INTERRUPTS(_old_) \
|
222 |
|
|
CYG_MACRO_START \
|
223 |
|
|
asm volatile ("move.w %%sr,%0\n" \
|
224 |
|
|
"move.w #0x2700,%%sr\n" : "=d" (_old_) : : "cc"); \
|
225 |
|
|
CYG_MACRO_END
|
226 |
|
|
#endif // HAL_DISABLE_INTERRUPTS
|
227 |
|
|
|
228 |
|
|
#ifndef HAL_RESTORE_INTERRUPTS
|
229 |
|
|
# define HAL_RESTORE_INTERRUPTS(_prev_) \
|
230 |
|
|
CYG_MACRO_START \
|
231 |
|
|
asm volatile ("move.w %0,%%sr\n" : : "d" (_prev_) : "cc"); \
|
232 |
|
|
CYG_MACRO_END
|
233 |
|
|
#endif
|
234 |
|
|
|
235 |
|
|
#ifndef HAL_QUERY_INTERRUPTS
|
236 |
|
|
# define HAL_QUERY_INTERRUPTS(_old_) \
|
237 |
|
|
CYG_MACRO_START \
|
238 |
|
|
asm volatile ("move.w %%sr,%0\n" : "=d" (_old_) : ); \
|
239 |
|
|
CYG_MACRO_END
|
240 |
|
|
#endif
|
241 |
|
|
|
242 |
|
|
// ----------------------------------------------------------------------------
|
243 |
|
|
// DSR's should always run on the interrupt stack if available.
|
244 |
|
|
// Even if no interrupt stack is in use we still want to go
|
245 |
|
|
// via call_pending_DSRs() so that it can manipulate the IPL
|
246 |
|
|
// level.
|
247 |
|
|
externC void hal_interrupt_stack_call_pending_DSRs(void);
|
248 |
|
|
# define HAL_INTERRUPT_STACK_CALL_PENDING_DSRS() hal_interrupt_stack_call_pending_DSRs()
|
249 |
|
|
|
250 |
|
|
// ----------------------------------------------------------------------------
|
251 |
|
|
// HAL_DELAY_US(). This implementation should work fine on all M68K
|
252 |
|
|
// processors. The variant/processor/platform HAL may already have
|
253 |
|
|
// supplied an implementation if for some reason this version is
|
254 |
|
|
// inappropriate.
|
255 |
|
|
//
|
256 |
|
|
// Lower-level HALs should define a count _HAL_M68K_DELAY_US_LOOPS_,
|
257 |
|
|
// and optionally _HAL_M68K_DELAY_US_LOOPS_UNCACHED_. These give the
|
258 |
|
|
// number of iterations needed for a single microsecond delay. In
|
259 |
|
|
// theory it can be worked out from the cpu and board specs, but in
|
260 |
|
|
// practice it is easier to do a bit of experimenting and fine-tune
|
261 |
|
|
// the numbers. Good initial values are 20 and 1 respectively. Note
|
262 |
|
|
// that the symbols need not be compile-time constants if e.g. the
|
263 |
|
|
// processor frequency may change at run-time for power management,
|
264 |
|
|
// but it is assumed that the values will not change as a side
|
265 |
|
|
// effect of interrupts or anything like that.
|
266 |
|
|
//
|
267 |
|
|
// An inline assembler version is used for two reasons. First it
|
268 |
|
|
// prevents the compiler from optimizing the code. Second it avoids
|
269 |
|
|
// problems when different versions of the compiler generate slightly
|
270 |
|
|
// better or worse code.
|
271 |
|
|
#ifndef HAL_DELAY_US
|
272 |
|
|
# ifndef _HAL_M68K_DELAY_US_LOOPS_
|
273 |
|
|
# error Variant, processor or platform HAL should supply loop count parameters
|
274 |
|
|
# else
|
275 |
|
|
# ifdef _HAL_M68K_DELAY_US_LOOPS_UNCACHED_
|
276 |
|
|
// A cache-aware version of the macro
|
277 |
|
|
# include <cyg/hal/hal_cache.h>
|
278 |
|
|
# define HAL_DELAY_US(_delay_) \
|
279 |
|
|
CYG_MACRO_START \
|
280 |
|
|
int _icache_enabled_; \
|
281 |
|
|
int _loops_; \
|
282 |
|
|
HAL_ICACHE_IS_ENABLED(_icache_enabled_); \
|
283 |
|
|
_loops_ = (_icache_enabled_) ? _HAL_M68K_DELAY_US_LOOPS_ : \
|
284 |
|
|
_HAL_M68K_DELAY_US_LOOPS_UNCACHED_; \
|
285 |
|
|
asm volatile ( "move.l %0, %%d0\n" \
|
286 |
|
|
"1:\n" \
|
287 |
|
|
"subq.l #1, %%d0\n" \
|
288 |
|
|
"beq 3f\n" \
|
289 |
|
|
"move.l %1, %%d1\n" \
|
290 |
|
|
"2:\n" \
|
291 |
|
|
"subq.l #1,%%d1\n" \
|
292 |
|
|
"bne 2b\n" \
|
293 |
|
|
"bra 1b\n" \
|
294 |
|
|
"3:\n" \
|
295 |
|
|
: \
|
296 |
|
|
: "d" ((_delay_) + 1), "d" ((_loops_)) \
|
297 |
|
|
: "cc", "d0", "d1"); \
|
298 |
|
|
CYG_MACRO_END
|
299 |
|
|
# else
|
300 |
|
|
# define HAL_DELAY_US(_delay_) \
|
301 |
|
|
CYG_MACRO_START \
|
302 |
|
|
int _loops_ = _HAL_M68K_DELAY_US_LOOPS_; \
|
303 |
|
|
asm volatile ( "move.l %0, %%d0\n" \
|
304 |
|
|
"1:\n" \
|
305 |
|
|
"subq.l #1, %%d0\n" \
|
306 |
|
|
"beq 3f\n" \
|
307 |
|
|
"move.l %1, %%d1\n" \
|
308 |
|
|
"2:\n" \
|
309 |
|
|
"subq.l #1,%%d1\n" \
|
310 |
|
|
"bne 2b\n" \
|
311 |
|
|
"bra 1b\n" \
|
312 |
|
|
"3:\n" \
|
313 |
|
|
: \
|
314 |
|
|
: "d" ((_delay_) + 1), "d" ((_loops_)) \
|
315 |
|
|
: "cc", "d0", "d1"); \
|
316 |
|
|
CYG_MACRO_END
|
317 |
|
|
# endif
|
318 |
|
|
# endif
|
319 |
|
|
#endif
|
320 |
|
|
|
321 |
|
|
// ----------------------------------------------------------------------------
|
322 |
|
|
// Reset support. This is done by disabling all interrupts and indirecting
|
323 |
|
|
// through the exception vector. Where possible variant or processor HALs
|
324 |
|
|
// should instead activate an on-chip reset controller.
|
325 |
|
|
|
326 |
|
|
#ifndef HAL_PLATFORM_RESET
|
327 |
|
|
# define HAL_PLATFORM_RESET() \
|
328 |
|
|
CYG_MACRO_START \
|
329 |
|
|
asm volatile ("move.w #0x2700,%%sr\n" \
|
330 |
|
|
"move.l %0,%%a0\n" \
|
331 |
|
|
"move.l 0(%%a0),%%a7\n" \
|
332 |
|
|
"move.l 4(%%a0),%%a1\n" \
|
333 |
|
|
"jmp (%%a1)\n" \
|
334 |
|
|
: : "a" (hal_m68k_vsr_table) : "a0", "a1", "memory"); \
|
335 |
|
|
CYG_MACRO_END
|
336 |
|
|
#endif
|
337 |
|
|
#ifndef HAL_PLATFORM_RESET_ENTRY
|
338 |
|
|
# define HAL_PLATFORM_RESET_ENTRY (*(cyg_uint32*)0x04)
|
339 |
|
|
#endif
|
340 |
|
|
|
341 |
|
|
// ----------------------------------------------------------------------------
|
342 |
|
|
// Functions/symbols exported to the variant and platform HAL's
|
343 |
|
|
externC void hal_m68k_exception_reset(void);
|
344 |
|
|
externC void hal_m68k_rte(void);
|
345 |
|
|
externC void hal_m68k_exception_vsr(void);
|
346 |
|
|
externC void hal_m68k_interrupt_vsr(void);
|
347 |
|
|
|
348 |
|
|
//---------------------------------------------------------------------------
|
349 |
|
|
#endif // ifndef CYGONCE_HAL_HAL_INTR_H
|