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Freescale M5272C3 Board Support
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Overview
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eCos Support for the Freescale M5272C3 Board
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Overview
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Description
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The Freescale M5272C3 board has an MCF5272 ColdFire processor, 4MB of
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external SDRAM, 2MB of external flash memory, and connectors plus
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required support chips for all the on-chip peripherals. By default the
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board comes with its own dBUG ROM monitor, located in the bottom half
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of the flash.
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For typical eCos development a RedBoot image is programmed into the
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top half of the flash memory, and the board is made to boot this image
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rather than the existing dBUG monitor. RedBoot provides gdb stub
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functionality so it is then possible to download and debug eCos
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applications via the gdb debugger. This can happen over either a
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serial line or over ethernet.
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Supported Hardware
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In a typical setup the bottom half of the flash memory is reserved for
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the dBUG ROM monitor and is not accessible to eCos. That leaves four
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flash blocks of 256K each. Of these one is used for the RedBoot image
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and another is used for managing the flash and holding RedBoot fconfig
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values. The remaining two blocks at 0xFFF40000 and 0xFFF80000 can be
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used by application code.
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By default eCos will only support the four megabytes of external SDRAM
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present on the initial versions of the board, accessible at location
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0x00000000. Later versions come with 16MB. If all 16MB of memory are
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required then the ACR0 register needs to be changed. The default value
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is controlled by the configuration option
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CYGNUM_HAL_M68K_M5272C3_ACR0, but this option is
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only used during ROM startup so in a typical setup it would be
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necessary to rebuild and update RedBoot. Alternatively the register
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can be updated by application code, preferably using a high priority
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static constructor to ensure that the extra memory is visible before
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any code tries to use that memory. It will also be necessary to change
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the memory layout so that the linker knows about the additional
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memory.
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By default the 4K of internal SRAM is mapped to location 0x20000000
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using the RAMBAR register. This is not used by eCos or by RedBoot so
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can be used by application code. The M68K architectural HAL has an
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iram1.c testcase to illustrate the linker script
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support for this. The internal 16K of ROM is left
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disabled by default because its contents are of no use to most
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applications. The on-chip peripherals are mapped at 0x10000000 via the
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MBAR register.
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There is a serial driver CYGPKG_DEVS_SERIAL_MCFxxxx
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which supports both on-chip UARTs. One of the UARTs, usually uart0,
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can be used by RedBoot for communication with the host. If this UART
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is needed by the application, either directly or via the serial
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driver, then it cannot also be used for RedBoot communication. Another
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communication channel such as ethernet should be used instead. The
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serial driver package is loaded automatically when configuring for the
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M5272C3 target.
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There is an ethernet driver CYGPKG_DEVS_ETH_MCFxxxx
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for the on-chip ethernet device. This driver is also loaded
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automatically when configuring for the M5272C3 target. The M5272C3
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board does not have a unique MAC address, so a suitable address has to
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be programmed into flash via RedBoot's fconfig
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command.
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eCos manages the on-chip interrupt controller. Timer 3 is used to
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implement the eCos system clock, but timers 0, 1 and 2 are unused and
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left for the application. The GPIO pins are manipulated only as needed
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to get the UARTs and ethernet working. eCos will reset the remaining
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on-chip peripherals (DMA, USB, PLCI, QSPI and PWM) during system
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startup or soft reset but will not otherwise manipulate them.
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Tools
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The M5272C3 port is intended to work with GNU tools configured for an
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m68k-elf target. The original port was done using m68k-elf-gcc version
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3.2.1, m68k-elf-gdb version 5.3, and binutils version 2.13.1.
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By default eCos is built using the compiler flag
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. Omitting the frame pointer
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eliminates some work on every function call and makes another register
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available, so the code should be smaller and faster. However without a
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frame pointer m68k-elf-gdb is not always able to identify stack
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frames, so it may be unable to provide accurate backtrace information.
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Removing this compiler flag from the configuration option
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CYGBLD_GLOBAL_CFLAGS avoids such debug problems.
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Setup
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Setup
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Preparing the M5272C3 board for eCos Development
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Overview
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In a typical development environment the M5272C3 board boots from
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flash into the RedBoot ROM monitor. eCos applications are configured
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for a RAM startup, and then downloaded and run on the board via the
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debugger m68k-elf-gdb. Preparing the board therefore involves
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programming a suitable RedBoot image into flash memory.
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The following RedBoot configurations are supported:
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Configuration
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Description
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Use
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File
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ROM
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RedBoot running from the board's flash
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redboot_ROM.ecm
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redboot_rom.bin
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dBUG
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Used for initial setup
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redboot_DBUG.ecm
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redboot_dbug.srec
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RAM
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Used for upgrading ROM version
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redboot_RAM.ecm
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redboot_ram.bin
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ROMFFE
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RedBoot running from the board's flash at 0xFFE00000
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redboot_ROMFFE.ecm
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redboot_romffe.bin
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For serial communications all versions run with 8 bits, no parity, and
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1 stop bit. The dBUG version runs at 19200 baud. The ROM and RAM
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versions run at 38400 baud. These baud rates can be changed via the
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configuration option
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CYGNUM_HAL_M68K_MCFxxxx_DIAGNOSTICS_BAUD and
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rebuilding RedBoot. By default RedBoot will use the board's terminal
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port, corresponding to uart0, but this can also be changed via the
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configuration option
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CYGHWR_HAL_M68K_MCFxxxx_DIAGNOSTICS_PORT. On an
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M5272C3 platform RedBoot also supports ethernet communication and
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flash management.
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Initial Installation
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This process assumes that the board still has its original dBUG ROM
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monitor and does not require any special debug hardware. It leaves the
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existing ROM monitor in place, allowing the setup process to be
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repeated just in case that should ever prove necessary.
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Programming the RedBoot rom monitor into flash memory requires an
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application that can manage flash blocks. RedBoot itself has this
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capability. Rather than have a separate application that is used only
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for flash management during the initial installation, a special
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RAM-resident version of RedBoot is loaded into memory and run. This
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version can then be used to load the normal flash-resident version of
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RedBoot and program it into the flash.
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The first step is to connect an RS232 cable between the M5272C3
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terminal port and the host PC. A suitable cable is supplied with the
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board. Next start a terminal emulation application such as
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HyperTerminal or minicom on the host PC and set the serial
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communication parameters to 19200 baud, 8 data bits, no parity, 1 stop
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bit (8N1) and no flow control (handshaking). Make sure that the jumper
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next to the flash chip is set for bootstrap from the bottom of flash,
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location 0xFFE00000. The details of this jumper depend on the revision
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of the board, so the supplied board documentation should be consulted
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for more details. Apply power to the board and you should see a
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dBUG> prompt.
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Once dBUG is up and running the RAM-resident version of RedBoot can be
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downloaded:
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dBUG> dl
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Escape to local host and send S-records now...
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The required S-records file is redboot_dbug.srec,
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which is normally supplied with the eCos release in the
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class="directory">loaders directory. If it needs to be
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rebuilt then instructions for this are supplied
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linkend="m68k-m5272c3-setup-rebuild">below. The file should be
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sent to the target as raw text using the terminal emulator:
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S-record download successful!
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dBUG>
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It is now possible to run the RAM-resident version of RedBoot:
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dBUG> go 0x20000
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+FLASH configuration checksum error or invalid key
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Ethernet eth0: MAC address 00:00:00:00:00:03
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Can't get BOOTP info for device!
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RedBoot(tm) bootstrap and debug environment [DBUG]
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Non-certified release, version v2_0_1 - built 09:55:34, Jun 24 2003
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Platform: M5272C3 (Freescale MCF5272)
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Copyright (C) 2000, 2001, 2002, Free Software Foundation, Inc.
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RAM: 0x00000000-0x00400000, 0x0003f478-0x003bd000 available
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FLASH: 0xffe00000 - 0x00000000, 8 blocks of 0x00040000 bytes each.
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RedBoot>
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At this stage the RedBoot flash management initialization has not yet
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happened so the warning about the configuration checksum error is
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expected. To perform this initialization use the
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fis init -f command:
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RedBoot> fis init -f
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About to initialize [format] FLASH image system - continue (y/n)? y
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*** Initialize FLASH Image System
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... Erase from 0xfff40000-0xfffc0000: ..
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... Erase from 0x00000000-0x00000000:
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... Erase from 0xfffc0000-0xffffffff: .
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... Program from 0x003bf000-0x003ff000 at 0xfffc0000: .
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RedBoot>
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The flash chip on the M5272C3 board is slow at erasing flash blocks so
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this operation can take some time. At the end the block of flash at
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location 0xFFFC0000 holds information about the various flash blocks,
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allowing other flash management operations to be performed. The next
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step is to set up RedBoot's non-volatile configuration values:
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RedBoot> fconfig -i
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Initialize non-volatile configuration - continue (y/n)? y
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Run script at boot: false
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Use BOOTP for network configuration: true
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DNS server IP address:
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GDB connection port: 9000
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Force console for special debug messages: false
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Network hardware address [MAC]: 0x00:0x00:0x00:0x00:0x00:0x03
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Network debug at boot time: false
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Update RedBoot non-volatile configuration - continue (y/n)? y
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... Erase from 0xfffc0000-0xffffffff: .
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... Program from 0x003bf000-0x003ff000 at 0xfffc0000: .
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RedBoot>
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For most of these configuration variables the default value is
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correct. If there is no suitable BOOTP service running on the local
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network then BOOTP should be disabled, and instead RedBoot will prompt
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for a fixed IP address, netmask, and addresses for the local gateway
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and DNS server. The other exception is the network hardware address,
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also known as MAC address. All boards should be given a unique MAC
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address, not the one in the above example. If there are two boards on
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the same network trying to use the same MAC address then the resulting
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behaviour is undefined.
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It is now possible to load the flash-resident version of RedBoot.
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Because of the way that flash chips work it is better to first load it
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into RAM and then program it into flash.
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RedBoot> load -r -m ymodem -b %{freememlo}
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The file redboot_rom.bin should now be uploaded
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using the terminal emulator. The file is a raw binary and should be
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transferred using the Y-modem protocol.
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Raw file loaded 0x0003f800-0x000545a3, assumed entry at 0x0003f800
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xyzModem - CRC mode, 2(SOH)/84(STX)/0(CAN) packets, 5 retries
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RedBoot>
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Once RedBoot has been loaded into RAM it can be programmed into flash:
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RedBoot> fis create RedBoot -b %{freememlo}
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An image named 'RedBoot' exists - continue (y/n)? y
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... Erase from 0xfff00000-0xfff40000: .
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... Program from 0x0003f800-0x0007f800 at 0xfff00000: .
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... Erase from 0xfffc0000-0xffffffff: .
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... Program from 0x003bf000-0x003ff000 at 0xfffc0000: .
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RedBoot>
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The flash-resident version of RedBoot has now programmed at location
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0xFFF00000, and the flash info block at 0xFFFC0000 has been updated.
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The initial setup is now complete. Power off the board and set the
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flash jumper to boot from location 0xFFF00000 instead of 0xFFE00000.
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Also set the terminal emulator to run at 38400 baud (the usual baud
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rate for RedBoot), and power up the board again.
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381 |
|
|
|
382 |
|
|
+Ethernet eth0: MAC address 00:00:00:00:00:03
|
383 |
|
|
Can't get BOOTP info for device!
|
384 |
|
|
|
385 |
|
|
RedBoot(tm) bootstrap and debug environment [ROM]
|
386 |
|
|
Non-certified release, version v2_0_1 - built 09:57:50, Jun 24 2003
|
387 |
|
|
|
388 |
|
|
Platform: M5272C3 (Freescale MCF5272)
|
389 |
|
|
Copyright (C) 2000, 2001, 2002, Free Software Foundation, Inc.
|
390 |
|
|
|
391 |
|
|
RAM: 0x00000000-0x00400000, 0x0000b400-0x003bd000 available
|
392 |
|
|
FLASH: 0xffe00000 - 0x00000000, 8 blocks of 0x00040000 bytes each.
|
393 |
|
|
RedBoot>
|
394 |
|
|
|
395 |
|
|
|
396 |
|
|
When RedBoot issues its prompt it is also ready to accept connections
|
397 |
|
|
from m68k-elf-gdb, allowing eCos applications to be downloaded and
|
398 |
|
|
debugged.
|
399 |
|
|
|
400 |
|
|
|
401 |
|
|
Occasionally it may prove necessary to update the installed RedBoot
|
402 |
|
|
image. This can be done simply by repeating the above process, using
|
403 |
|
|
dBUG to load the dBUG version of RedBoot
|
404 |
|
|
redboot_dbug.srec. Alternatively the existing
|
405 |
|
|
RedBoot install can be used to load a RAM-resident version,
|
406 |
|
|
redboot_ram.bin.
|
407 |
|
|
|
408 |
|
|
|
409 |
|
|
The ROMFFE version of RedBoot can be installed at location 0xFFE00000,
|
410 |
|
|
replacing dBUG. This may be useful if the system needs more flash
|
411 |
|
|
blocks than are available with the usual ROM RedBoot. Installing this
|
412 |
|
|
RedBoot image will typically involve a BDM-based utility.
|
413 |
|
|
|
414 |
|
|
|
415 |
|
|
|
416 |
|
|
Rebuilding RedBoot
|
417 |
|
|
|
418 |
|
|
Should it prove necessary to rebuild a RedBoot binary, this is done
|
419 |
|
|
most conveniently at the command line. The steps needed to rebuild the
|
420 |
|
|
dBUG version of RedBoot are:
|
421 |
|
|
|
422 |
|
|
|
423 |
|
|
$ mkdir redboot_dbug
|
424 |
|
|
$ cd redboot_dbug
|
425 |
|
|
$ ecosconfig new m5272c3 redboot
|
426 |
|
|
$ ecosconfig import $ECOS_REPOSITORY/hal/m68k/mcf52xx/mcf5272/m5272c3/v2_0_1/misc/redboot_DBUG.ecm
|
427 |
|
|
$ ecosconfig resolve
|
428 |
|
|
$ ecosconfig tree
|
429 |
|
|
$ make
|
430 |
|
|
|
431 |
|
|
|
432 |
|
|
At the end of the build the
|
433 |
|
|
class="directory">install/bin subdirectory should contain
|
434 |
|
|
the required file redboot_dbug.srec.
|
435 |
|
|
|
436 |
|
|
|
437 |
|
|
Rebuilding the RAM and ROM versions involves basically the same
|
438 |
|
|
process. The RAM version uses the file
|
439 |
|
|
redboot_RAM.ecm and generates a file
|
440 |
|
|
redboot_ram.bin. The ROM version uses the file
|
441 |
|
|
redboot_ROM.ecm and generates a file
|
442 |
|
|
redboot_rom.bin.
|
443 |
|
|
|
444 |
|
|
|
445 |
|
|
|
446 |
|
|
BDM
|
447 |
|
|
|
448 |
|
|
An alternative to debugging an application on top of Redboot is to use
|
449 |
|
|
a BDM hardware debug solution. On the eCos side this requires building
|
450 |
|
|
the configuration for RAM startup and
|
451 |
|
|
with CYGSEM_HAL_USE_ROM_MONITOR disabled. Note that
|
452 |
|
|
a RAM build of RedBoot automatically has the latter configuration
|
453 |
|
|
option disabled, so it is possible to run a RAM RedBoot via BDM and
|
454 |
|
|
bypass the dBUG stages of the installation process.
|
455 |
|
|
|
456 |
|
|
|
457 |
|
|
On the host-side the details depend on exactly which BDM solution is
|
458 |
|
|
in use. Typically it will be necessary to initialize the hardware
|
459 |
|
|
prior to downloading the eCos application, either via a configuration
|
460 |
|
|
file or by using gdb macros. The
|
461 |
|
|
file misc/bdm.gdb in the platform HAL defines
|
462 |
|
|
example gdb macros.
|
463 |
|
|
|
464 |
|
|
|
465 |
|
|
|
466 |
|
|
|
467 |
|
|
|
468 |
|
|
|
469 |
|
|
|
470 |
|
|
|
471 |
|
|
|
472 |
|
|
|
473 |
|
|
Configuration
|
474 |
|
|
|
475 |
|
|
|
476 |
|
|
Configuration
|
477 |
|
|
Platform-specific Configuration Options
|
478 |
|
|
|
479 |
|
|
|
480 |
|
|
Overview
|
481 |
|
|
|
482 |
|
|
The M5272C3 platform HAL package is loaded automatically when eCos is
|
483 |
|
|
configured for an M5272C3 target. It should never be necessary to load
|
484 |
|
|
this package explicitly. Unloading the package should only happen as a
|
485 |
|
|
side effect of switching target hardware.
|
486 |
|
|
|
487 |
|
|
|
488 |
|
|
|
489 |
|
|
Startup
|
490 |
|
|
|
491 |
|
|
The M5272C3 platform HAL package supports four separate startup types:
|
492 |
|
|
|
493 |
|
|
|
494 |
|
|
|
495 |
|
|
RAM
|
496 |
|
|
|
497 |
|
|
This is the startup type which is normally used during application
|
498 |
|
|
development. The board has RedBoot programmed into flash at location
|
499 |
|
|
0xFFF00000 and boots from that location.
|
500 |
|
|
m68k-elf-gdb is then used to load a RAM
|
501 |
|
|
startup application into memory and debug it. It is assumed that the
|
502 |
|
|
hardware has already been initialized by RedBoot. By default the
|
503 |
|
|
application will use eCos' virtual vectors mechanism to obtain certain
|
504 |
|
|
services from RedBoot, including diagnostic output.
|
505 |
|
|
|
506 |
|
|
|
507 |
|
|
|
508 |
|
|
ROM
|
509 |
|
|
|
510 |
|
|
This startup type can be used for finished applications which will
|
511 |
|
|
be programmed into flash at location 0xFFF00000. The application will
|
512 |
|
|
be self-contained with no dependencies on services provided by other
|
513 |
|
|
software. eCos startup code will perform all necessary hardware
|
514 |
|
|
initialization.
|
515 |
|
|
|
516 |
|
|
|
517 |
|
|
|
518 |
|
|
ROMFFE
|
519 |
|
|
|
520 |
|
|
This is a variant of the ROM startup type which can be used if the
|
521 |
|
|
application will be programmed into flash at location 0xFFE00000,
|
522 |
|
|
overwriting the board's dBUG ROM monitor.
|
523 |
|
|
|
524 |
|
|
|
525 |
|
|
|
526 |
|
|
|
527 |
|
|
DBUG
|
528 |
|
|
|
529 |
|
|
This is a variant of the RAM startup which allows applications to be
|
530 |
|
|
loaded via the board's dBUG ROM monitor rather than via RedBoot. It
|
531 |
|
|
exists mainly to support the dBUG version of RedBoot which is needed
|
532 |
|
|
during hardware setup. Once the application has started it will take
|
533 |
|
|
over all the hardware, and it will not depend on any services provided
|
534 |
|
|
by dBUG. This startup type does not provide gdb debug facilities.
|
535 |
|
|
|
536 |
|
|
|
537 |
|
|
|
538 |
|
|
|
539 |
|
|
|
540 |
|
|
|
541 |
|
|
RedBoot and Virtual Vectors
|
542 |
|
|
|
543 |
|
|
If the application is intended to act as a ROM monitor, providing
|
544 |
|
|
services for other applications, then the configuration option
|
545 |
|
|
CYGSEM_HAL_ROM_MONITOR should be set. Typically
|
546 |
|
|
this option is set only when building RedBoot.
|
547 |
|
|
|
548 |
|
|
|
549 |
|
|
If the application is supposed to make use of services provided by a
|
550 |
|
|
ROM monitor, via the eCos virtual vector mechanism, then the
|
551 |
|
|
configuration option CYGSEM_HAL_USE_ROM_MONITOR
|
552 |
|
|
should be set. By default this option is enabled when building for a
|
553 |
|
|
RAM startup, disabled otherwise. It can be manually disabled for a RAM
|
554 |
|
|
startup, making the application self-contained, as a testing step
|
555 |
|
|
before switching to ROM startup.
|
556 |
|
|
|
557 |
|
|
|
558 |
|
|
If the application does not rely on a ROM monitor for diagnostic
|
559 |
|
|
services then one of the serial ports will be claimed for HAL
|
560 |
|
|
diagnostics. By default eCos will use the terminal port, corresponding
|
561 |
|
|
to uart0. The auxiliary port, uart1, can be selected instead via the
|
562 |
|
|
configuration option
|
563 |
|
|
CYGHWR_HAL_M68K_MCFxxxx_DIAGNOSTICS_PORT. The baud
|
564 |
|
|
rate for the selected port is controlled by
|
565 |
|
|
CYGNUM_HAL_M68K_MCFxxxx_DIAGNOSTICS_BAUD.
|
566 |
|
|
|
567 |
|
|
|
568 |
|
|
|
569 |
|
|
Flash Driver
|
570 |
|
|
|
571 |
|
|
The platform HAL package contains flash driver support. By default
|
572 |
|
|
this is inactive, and it can be made active by loading the generic
|
573 |
|
|
flash package CYGPKG_IO_FLASH.
|
574 |
|
|
|
575 |
|
|
|
576 |
|
|
|
577 |
|
|
Special Registers
|
578 |
|
|
|
579 |
|
|
The MCF5272 processor has a number of special registers controlling
|
580 |
|
|
the cache, on-chip RAM and ROM, and so on. The platform HAL provides a
|
581 |
|
|
number of configuration options for setting these, for example
|
582 |
|
|
CYGNUM_HAL_M68K_M5272C3_RAMBAR controls the initial
|
583 |
|
|
value of the RAMBAR register. These options are only used during a ROM
|
584 |
|
|
or ROMFFE startup. For a RAM startup it will be RedBoot that
|
585 |
|
|
initializes these registers, so if the default values are not
|
586 |
|
|
appropriate for the target application then it will be necessary to
|
587 |
|
|
rebuild RedBoot with new settings for these options. Alternatively it
|
588 |
|
|
should be possible to reprogram some or all of the registers early on
|
589 |
|
|
during startup, for example by using a high-priority static
|
590 |
|
|
constructor.
|
591 |
|
|
|
592 |
|
|
|
593 |
|
|
One of the special registers, MBAR, cannot be controlled via a
|
594 |
|
|
configuration option. Changing the value of this register could have
|
595 |
|
|
drastic effects on the system, for example moving the on-chip
|
596 |
|
|
peripherals to a different location in memory, and it would be very
|
597 |
|
|
easy to end up with inconsistencies between RedBoot and the eCos
|
598 |
|
|
application. Instead the on-chip peripherals are always mapped to
|
599 |
|
|
location 0x10000000.
|
600 |
|
|
|
601 |
|
|
|
602 |
|
|
|
603 |
|
|
System Clock
|
604 |
|
|
|
605 |
|
|
By default the system clock interrupts once every 10ms, corresponding
|
606 |
|
|
to a 100Hz clock. This can be changed by the configuration option
|
607 |
|
|
CYGNUM_HAL_RTC_PERIOD, the number of microseconds
|
608 |
|
|
between clock ticks. Other clock-related settings are recalculated
|
609 |
|
|
automatically if the period is changed.
|
610 |
|
|
|
611 |
|
|
|
612 |
|
|
|
613 |
|
|
Compiler Flags
|
614 |
|
|
|
615 |
|
|
The platform HAL defines the default compiler and linker flags for all
|
616 |
|
|
packages, although it is possible to override these on a per-package
|
617 |
|
|
basis. Most of the flags used are the same as for other architectures
|
618 |
|
|
supported by eCos. There are three flags specific to this port:
|
619 |
|
|
|
620 |
|
|
|
621 |
|
|
|
622 |
|
|
|
623 |
|
|
|
624 |
|
|
The m68k-elf-gcc compiler supports many
|
625 |
|
|
variants of the M68K architecture, from the original 68000 onwards.
|
626 |
|
|
For an MCF5272 processor should be used.
|
627 |
|
|
|
628 |
|
|
|
629 |
|
|
|
630 |
|
|
|
631 |
|
|
|
632 |
|
|
This option forces m68k-elf-gcc to align
|
633 |
|
|
integer and floating point data to a 32-bit boundary rather than a
|
634 |
|
|
16-bit boundary. It should improve performance. However the resulting
|
635 |
|
|
code is incompatible with most published application binary interface
|
636 |
|
|
specifications for M68K processors, so it is possible that this option
|
637 |
|
|
causes problems with existing third-party object code.
|
638 |
|
|
|
639 |
|
|
|
640 |
|
|
|
641 |
|
|
|
642 |
|
|
|
643 |
|
|
Traditionally the %A6 register was used as a
|
644 |
|
|
dedicated frame pointer, and the compiler was expected to generate
|
645 |
|
|
link and unlink instructions on procedure entry and exit. These days
|
646 |
|
|
the compiler is perfectly capable of generating working code without a
|
647 |
|
|
frame pointer, so omitting the frame pointer often saves some work
|
648 |
|
|
during procedure entry and exit and makes another register available
|
649 |
|
|
for optimization. However without a frame pointer register the
|
650 |
|
|
m68k-elf-gdb debugger is not always able to
|
651 |
|
|
interpret a thread stack, so it cannot reliably give a backtrace.
|
652 |
|
|
Removing from the default flags
|
653 |
|
|
will make debugging easier, but the generated code may be worse.
|
654 |
|
|
|
655 |
|
|
|
656 |
|
|
|
657 |
|
|
|
658 |
|
|
|
659 |
|
|
|
660 |
|
|
|
661 |
|
|
|
662 |
|
|
|
663 |
|
|
|
664 |
|
|
|
665 |
|
|
|
666 |
|
|
The HAL Port
|
667 |
|
|
|
668 |
|
|
|
669 |
|
|
HAL Port
|
670 |
|
|
Implementation Details
|
671 |
|
|
|
672 |
|
|
|
673 |
|
|
Overview
|
674 |
|
|
|
675 |
|
|
This documentation explains how the eCos HAL specification has been
|
676 |
|
|
mapped onto the M5272C3 hardware, and shold be read in conjunction
|
677 |
|
|
with that specification. The M5272C3 platform HAL package complements
|
678 |
|
|
the M68K architectural HAL, the MCFxxxx variant HAL, and the MCF5272
|
679 |
|
|
processor HAL. It provides functionality which is specific to the
|
680 |
|
|
target board.
|
681 |
|
|
|
682 |
|
|
|
683 |
|
|
|
684 |
|
|
Startup
|
685 |
|
|
|
686 |
|
|
Following a hard or soft reset the HAL will initialize or
|
687 |
|
|
reinitialize most of the on-chip peripherals. There is an exception
|
688 |
|
|
for RAM startup applications which depend on a ROM monitor for certain
|
689 |
|
|
services: the UARTs and the ethernet device will not be reinitialized
|
690 |
|
|
because they may be in use by RedBoot for communication with the host.
|
691 |
|
|
|
692 |
|
|
|
693 |
|
|
For a ROM or ROMFFE startup the HAL will perform additional
|
694 |
|
|
initialization, setting up the external DRAM and programming the
|
695 |
|
|
various internal registers. The values used for most of these
|
696 |
|
|
registers are
|
697 |
|
|
linkend="m68k-m5272c3-config-registers">configurable. Full
|
698 |
|
|
details can be found in the exported headers
|
699 |
|
|
class="headerfile">cyg/hal/plf.inc
|
700 |
|
|
and .
|
701 |
|
|
|
702 |
|
|
|
703 |
|
|
|
704 |
|
|
Linker Scripts and Memory Maps
|
705 |
|
|
|
706 |
|
|
The platform HAL package provides the memory layout information needed
|
707 |
|
|
to generate the linker script. The key memory locations are as follows:
|
708 |
|
|
|
709 |
|
|
|
710 |
|
|
|
711 |
|
|
external SDRAM
|
712 |
|
|
|
713 |
|
|
This is mapped to location 0x00000000. The first 384 bytes are used
|
714 |
|
|
for hardware exception vectors. The next 256 bytes are normally used
|
715 |
|
|
for the eCos virtual vectors, allowing RAM-based applications to use
|
716 |
|
|
services provided by the ROM monitor. For ROM and ROMFFE startup all
|
717 |
|
|
remaining SDRAM is available. For RAM and DBUG startup available SDRAM
|
718 |
|
|
starts at location 0x00020000, with the bottom 128K reserved for use
|
719 |
|
|
by either the RedBoot or dBUG ROM monitors.
|
720 |
|
|
|
721 |
|
|
|
722 |
|
|
|
723 |
|
|
on-chip peripherals
|
724 |
|
|
|
725 |
|
|
These are accessible at location 0x10000000 onwards, as per the
|
726 |
|
|
defined symbol HAL_MCFxxxx_MBAR. This address
|
727 |
|
|
cannot easily be changed during development because both the ROM
|
728 |
|
|
monitor and the application must use the same address. The
|
729 |
|
|
%mbar system register is initialized appropriately
|
730 |
|
|
during a ROM or ROMFFE startup.
|
731 |
|
|
|
732 |
|
|
|
733 |
|
|
|
734 |
|
|
on-chip SRAM
|
735 |
|
|
|
736 |
|
|
The 4K of internal SRAM are normally mapped at location 0x20000000.
|
737 |
|
|
The %rambar register is initialized
|
738 |
|
|
during a ROM startup using the value of the configuration
|
739 |
|
|
option CYGNUM_HAL_M68K_M5272C3_RAMBAR. Neither eCos
|
740 |
|
|
nor RedBoot use the internal SRAM so all of it is available to
|
741 |
|
|
application code.
|
742 |
|
|
|
743 |
|
|
|
744 |
|
|
|
745 |
|
|
on-chip ROM
|
746 |
|
|
|
747 |
|
|
Usually this is left disabled since its contents are of no interest to
|
748 |
|
|
most applications. If it is enabled then it is usually mapped at
|
749 |
|
|
location 0x21000000. The %rombar register is
|
750 |
|
|
initialized during a ROM startup using the value of the configuration
|
751 |
|
|
option CYGNUM_HAL_M68K_M5272C3_ROMBAR.
|
752 |
|
|
|
753 |
|
|
|
754 |
|
|
|
755 |
|
|
off-chip Flash
|
756 |
|
|
|
757 |
|
|
This is located at the top of memory, location 0xFFE00000 onwards. For
|
758 |
|
|
ROM and RAM startups it is assumed that a jumper is used to disable
|
759 |
|
|
the bottom half of the flash, so location 0xFFE00000 is actually a
|
760 |
|
|
mirror of 0xFFF00000. For ROMFFE and DBUG startups all of the flash is
|
761 |
|
|
visible. By default the flash block at location 0xFFF00000 is used to
|
762 |
|
|
hold RedBoot or another ROM startup application, and the block at
|
763 |
|
|
location 0xFFFC00000 is used to hold flash management data and the
|
764 |
|
|
RedBoot fconfig variables. The blocks at
|
765 |
|
|
0xFFF400000 and 0xFFF80000 can be used by application code.
|
766 |
|
|
|
767 |
|
|
|
768 |
|
|
|
769 |
|
|
|
770 |
|
|
|
771 |
|
|
Clock Support
|
772 |
|
|
|
773 |
|
|
The platform HAL provides configuration options for the eCos system
|
774 |
|
|
clock. This always uses the hardware timer 3, which should not be used
|
775 |
|
|
directly by application code. The gprof-based profiling code uses
|
776 |
|
|
timer 2, so that is only available when not profiling. Timers 0 and 1
|
777 |
|
|
are never used by eCos so application code is free to manipulate these
|
778 |
|
|
as required. The actual HAL macros for managing the clock are provided
|
779 |
|
|
by the MCF5272 processor HAL. The specific numbers used are a
|
780 |
|
|
characteristic of the platform because they depend on the processor
|
781 |
|
|
speed.
|
782 |
|
|
|
783 |
|
|
|
784 |
|
|
|
785 |
|
|
Other Issues
|
786 |
|
|
|
787 |
|
|
The M5272C3 platform HAL does not affect the implementation of other
|
788 |
|
|
parts of the eCos HAL specification. The MCF5272 processor HAL, the
|
789 |
|
|
MCFxxxx variant HAL, and the M68K architectural HAL documentation
|
790 |
|
|
should be consulted for further details.
|
791 |
|
|
|
792 |
|
|
|
793 |
|
|
|
794 |
|
|
Other Functionality
|
795 |
|
|
|
796 |
|
|
The platform HAL package also provides a flash driver for the off-chip
|
797 |
|
|
AMD AM29PL160C flash chip. This driver is inactive by default, and
|
798 |
|
|
only becomes active if the configuration includes the generic flash
|
799 |
|
|
support CYGPKG_IO_FLASH.
|
800 |
|
|
|
801 |
|
|
|
802 |
|
|
|
803 |
|
|
|
804 |
|
|
|
805 |
|
|
|
806 |
|
|
|
807 |
|
|
|