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#ifndef CYGONCE_PROC_CACHE_H
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#define CYGONCE_PROC_CACHE_H
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//=============================================================================
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//
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// proc_cache.h
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//
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// Cache details for an mcf5272
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 2003, 2004, 2006, 2008 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): bartv
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// Date: 2003-06-04
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//
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//####DESCRIPTIONEND####
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//=============================================================================
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#include <cyg/infra/cyg_type.h>
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#include <cyg/hal/var_io.h>
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// An mcf5272 has a 1k direct-mapped instruction cache, 64 lines * 16 bytes.
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// There is no data cache. The cache control register is write-only so it
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// is necessary to keep a soft copy.
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externC cyg_uint32 hal_mcf5272_cacr;
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#define HAL_ICACHE_SIZE 1024
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#define HAL_ICACHE_LINE_SIZE 16
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#define HAL_ICACHE_WAYS 64
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#define HAL_ICACHE_SETS 1
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#define HAL_ICACHE_ENABLE() \
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CYG_MACRO_START \
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hal_mcf5272_cacr = (hal_mcf5272_cacr & ~HAL_MCFxxxx_CACR_CINV) | HAL_MCFxxxx_CACR_CENB; \
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asm volatile ( "movec.l %0,%%cacr\n" : : "d" (hal_mcf5272_cacr) : "memory") ; \
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CYG_MACRO_END
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#define HAL_ICACHE_DISABLE() \
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CYG_MACRO_START \
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hal_mcf5272_cacr &= ~(HAL_MCFxxxx_CACR_CENB | HAL_MCFxxxx_CACR_CINV); \
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asm volatile ( "movec.l %0,%%cacr\n" : : "d" (hal_mcf5272_cacr) : "memory") ; \
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CYG_MACRO_END
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#define HAL_ICACHE_IS_ENABLED(_state_) \
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CYG_MACRO_START \
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_state_ = (0 != (hal_mcf5272_cacr & HAL_MCFxxxx_CACR_CENB)); \
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CYG_MACRO_END
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// A full cache invalidate takes 64 cycles. This is expensive if only one
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// or two lines need to be invalidated, but doing the arithmetic and tests
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// needed to affect just the necessary lines would also take quite a few
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// cycles. Hence it is simpler to just invalidate the lot.
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#define HAL_ICACHE_INVALIDATE_ALL() \
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CYG_MACRO_START \
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asm volatile ( "movec.l %0,%%cacr\n" : : "d" (hal_mcf5272_cacr | HAL_MCFxxxx_CACR_CINV) : "memory" ); \
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CYG_MACRO_END
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#define HAL_ICACHE_INVALIDATE(_base_, _size_) \
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CYG_MACRO_START \
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HAL_ICACHE_INVALIDATE_ALL(); \
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CYG_MACRO_END
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#define HAL_ICACHE_SYNC() \
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CYG_MACRO_START \
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HAL_ICACHE_INVALIDATE_ALL(); \
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CYG_MACRO_END
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#endif // ifndef CYGONCE_PROC_CACHE_H
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// End of proc_cache.h
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