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##=============================================================================
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##
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## var.inc
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##
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## mcfxxxx variant assembler header file
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##
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##=============================================================================
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## ####ECOSGPLCOPYRIGHTBEGIN####
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## -------------------------------------------
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## This file is part of eCos, the Embedded Configurable Operating System.
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## Copyright (C) 2003, 2004, 2006, 2008 Free Software Foundation, Inc.
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##
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## eCos is free software; you can redistribute it and/or modify it under
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## the terms of the GNU General Public License as published by the Free
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## Software Foundation; either version 2 or (at your option) any later
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## version.
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##
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## eCos is distributed in the hope that it will be useful, but WITHOUT
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## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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## for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with eCos; if not, write to the Free Software Foundation, Inc.,
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## 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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##
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## As a special exception, if other files instantiate templates or use
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## macros or inline functions from this file, or you compile this file
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## and link it with other works to produce a work based on this file,
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## this file does not by itself cause the resulting work to be covered by
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## the GNU General Public License. However the source code for this file
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## must still be made available in accordance with section (3) of the GNU
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## General Public License v2.
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##
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## This exception does not invalidate any other reasons why a work based
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## on this file might be covered by the GNU General Public License.
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## -------------------------------------------
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## ####ECOSGPLCOPYRIGHTEND####
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##=============================================================================
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#######DESCRIPTIONBEGIN####
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##
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## Author(s): bartv
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## Date: 2003-06-04
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######DESCRIPTIONEND####
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##=============================================================================
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// ----------------------------------------------------------------------------
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// Generic support for the MAC and eMAC units.
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// Not yet implemented.
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// ----------------------------------------------------------------------------
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// Now include the cpu-specific header, which can define context macros
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// including the MAC, eMAC, and possibly other state
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#include
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// ----------------------------------------------------------------------------
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// Thread context support. Usually this is generic for all ColdFires,
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// but it is possible for processor or platform code to override
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// these definitions.
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// The 68K exception and interrupt VSR's can be used directly since the
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// vector number is part of the hardware state automatically pushed onto
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// the stack. Since there are no trampolines there is no need to adjust
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// the stack before returning.
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#ifndef HAL_CONTEXT_PCSR_RTE_ADJUST
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# define HAL_CONTEXT_PCSR_RTE_ADJUST 0
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#endif
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#ifndef HAL_CONTEXT_PCSR_SAVE_SR_DEFINED
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.macro hal_context_pcsr_save_sr reg=%sp,off=0,scratch=%d0
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mov.l #0x40000000, \scratch
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mov.w %sr, \scratch
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mov.l \scratch, (hal_context_pcsr_offset+\off)(\reg)
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.endm
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#endif
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// Get the ISR vector out of the context. This is encoded in one
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// byte in the exception frame. There are two versions depending
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// on the number of ISR vectors. If < 64, i.e. if an interrupt
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// falls in the range 64 <= isrvec < 128, then a simple mask
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// will do the trick. If > 164, i.e. if an interrupt falls in
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// the range 64 <= isrvec < 256, then a subtract is required.
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#ifndef HAL_CONTEXT_EXTRACT_ISR_DEFINED
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# if HAL_M68K_VSR_COUNT > 128
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.macro hal_context_extract_isr_vector_shl2 reg=%sp,off=0,isr
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mov.w (hal_context_pcsr_offset+\off)(\reg),\isr
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andi.l #0x03FC, \isr
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subi.l #0x0100, \isr
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.endm
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.macro hal_context_extract_isr_vector reg=%sp,off=0,isr
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mov.w (hal_context_pcsr_offset+\off)(\reg),\isr
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andi.l #0x03FC, \isr
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lsr.l #2, \isr
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subi.l #0x040, \isr
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.endm
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# else
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.macro hal_context_extract_isr_vector_shl2 reg=%sp,off=0,isr
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mov.w (hal_context_pcsr_offset+\off)(\reg),\isr
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andi.l #0x00FC, \isr
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.endm
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.macro hal_context_extract_isr_vector reg=%sp,off=0,isr
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mov.w (hal_context_pcsr_offset+\off)(\reg),\isr
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andi.l #0x0FC, \isr
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lsr.l #2, \isr
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.endm
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# endif
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#endif
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#------------------------------------------------------------------------------
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# end of var.inc
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