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//=============================================================================
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//
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// smsc37m81x.c
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//
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// Init code for SMSC 37m81x super IO controller
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): jskov
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// Contributors:jskov
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// Date: 2001-04-02
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// Description: Init code for SMSC 37m81x super IO controller
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//
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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#include <pkgconf/hal.h>
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#include CYGBLD_HAL_PLATFORM_H
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#include <cyg/hal/hal_arch.h> // SAVE/RESTORE GP macros
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#include <cyg/hal/hal_io.h> // IO macros
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#include <cyg/hal/hal_intr.h> // interrupt vectors
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// From page 137+ in SMSC-37m81x.pdf
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#define SMSC_CONFIG 0xb80003f0
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#define SMSC_CONFIG_DATA 0xb80003f1
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#define SMSC_CONFIG_DEV 0x07
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#define SMSC_CONFIG_ACTIVATE 0x30
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#define SMSC_CONFIG_ENTER 0x55
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#define SMSC_CONFIG_BASE_HIGH 0x60
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#define SMSC_CONFIG_BASE_LOW 0x61
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#define SMSC_CONFIG_IRQ 0x70
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#define SMSC_CONFIG_EXIT 0xaa
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#define SMSC_CONFIG_MODE 0xf0
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#define SMSC_CONFIG_DEV_COM1 0x04
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#define SMSC_CONFIG_DEV_COM2 0x05
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#define SMSC_CONFIG_MODE_HIGH 0x02
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#define SMSC_CONFIG_ACTIVATE_ENABLE 0x01
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void
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cyg_hal_init_superIO(void)
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{
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HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_ENTER);
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// Configure and enable COM1
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HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_DEV);
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HAL_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_DEV_COM1);
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HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_BASE_HIGH);
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HAL_WRITE_UINT8(SMSC_CONFIG_DATA, 0x03);
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HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_BASE_LOW);
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HAL_WRITE_UINT8(SMSC_CONFIG_DATA, 0xf8);
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HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_IRQ);
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HAL_WRITE_UINT8(SMSC_CONFIG_DATA,
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(CYGNUM_HAL_INTERRUPT_TTY0-CYGNUM_HAL_INTERRUPT_EXTERNAL_BASE));
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HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_MODE);
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HAL_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_MODE_HIGH);
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HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_ACTIVATE);
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HAL_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_ACTIVATE_ENABLE);
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// Configure and enable COM2
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HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_DEV);
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HAL_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_DEV_COM2);
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HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_BASE_HIGH);
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HAL_WRITE_UINT8(SMSC_CONFIG_DATA, 0x02);
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HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_BASE_LOW);
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HAL_WRITE_UINT8(SMSC_CONFIG_DATA, 0xf8);
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HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_IRQ);
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HAL_WRITE_UINT8(SMSC_CONFIG_DATA,
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(CYGNUM_HAL_INTERRUPT_TTY1-CYGNUM_HAL_INTERRUPT_EXTERNAL_BASE));
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HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_MODE);
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HAL_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_MODE_HIGH);
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HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_ACTIVATE);
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HAL_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_ACTIVATE_ENABLE);
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HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_EXIT);
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}
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//-----------------------------------------------------------------------------
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// end of smsc37m81x.c
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