OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [mips/] [mips64/] [current/] [include/] [variant.inc] - Blame information for rev 786

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 786 skrzyp
#ifndef CYGONCE_HAL_VARIANT_INC
2
#define CYGONCE_HAL_VARIANT_INC
3
##=============================================================================
4
##
5
##      variant.inc
6
##
7
##      MIPS 32 family assembler header file
8
##
9
##=============================================================================
10
## ####ECOSGPLCOPYRIGHTBEGIN####
11
## -------------------------------------------
12
## This file is part of eCos, the Embedded Configurable Operating System.
13
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
14
##
15
## eCos is free software; you can redistribute it and/or modify it under
16
## the terms of the GNU General Public License as published by the Free
17
## Software Foundation; either version 2 or (at your option) any later
18
## version.
19
##
20
## eCos is distributed in the hope that it will be useful, but WITHOUT
21
## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
22
## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
23
## for more details.
24
##
25
## You should have received a copy of the GNU General Public License
26
## along with eCos; if not, write to the Free Software Foundation, Inc.,
27
## 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
28
##
29
## As a special exception, if other files instantiate templates or use
30
## macros or inline functions from this file, or you compile this file
31
## and link it with other works to produce a work based on this file,
32
## this file does not by itself cause the resulting work to be covered by
33
## the GNU General Public License. However the source code for this file
34
## must still be made available in accordance with section (3) of the GNU
35
## General Public License v2.
36
##
37
## This exception does not invalidate any other reasons why a work based
38
## on this file might be covered by the GNU General Public License.
39
## -------------------------------------------
40
## ####ECOSGPLCOPYRIGHTEND####
41
##=============================================================================
42
#######DESCRIPTIONBEGIN####
43
##
44
## Author(s):   dmoseley
45
## Contributors:        dmoseley
46
## Date:        2001-01-30
47
## Purpose:     MIPS64 family definitions.
48
## Description: This file contains various definitions and macros that are
49
##              useful for writing assembly code for the MIPS64 CPU family.
50
## Usage:
51
##              #include 
52
##              ...
53
##
54
##
55
######DESCRIPTIONEND####
56
##
57
##=============================================================================
58
 
59
#include 
60
 
61
#include 
62
 
63
#include 
64
 
65
#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
66
#include 
67
#include 
68
 
69
##-----------------------------------------------------------------------------
70
## Define CPU variant for architecture HAL.
71
 
72
#define CYG_HAL_MIPS_MIPS64
73
 
74
# Set the KX bit to use 64 bit addressing in kernel mode.
75
 
76
#define INITIAL_SR_VAR 0x00000080
77
 
78
#------------------------------------------------------------------------------
79
# Cache macros.
80
 
81
#ifndef CYGPKG_HAL_MIPS_CACHE_DEFINED
82
 
83
        .macro  hal_cache_init
84
 
85
        # Setup a temporary stack pointer for running C code.
86
        la      a0,__interrupt_stack
87
        move    sp,a0
88
        CYGARC_ADDRESS_REG_UNCACHED(sp)
89
 
90
        # Read the CONFIG1 register into a0
91
        mfc0    a0, C0_CONFIG, 1
92
        nop
93
        nop
94
        nop
95
 
96
        # Jump to C-code to initialize caches (uncached)
97
        lar     k0, hal_c_cache_init
98
        CYGARC_ADDRESS_REG_UNCACHED(k0)
99
        jalr    k0
100
        nop
101
        .endm
102
 
103
#define CYGPKG_HAL_MIPS_CACHE_DEFINED
104
 
105
#endif
106
 
107
#------------------------------------------------------------------------------
108
# Monitor initialization.
109
 
110
#ifndef CYGPKG_HAL_MIPS_MON_DEFINED
111
 
112
#if     defined(CYG_HAL_STARTUP_ROM) ||                 \
113
        (       defined(CYG_HAL_STARTUP_RAM) &&         \
114
                !defined(CYGSEM_HAL_USE_ROM_MONITOR))
115
        # If we are starting up from ROM, or we are starting in
116
        # RAM and NOT using a ROM monitor, initialize the VSR table.
117
 
118
        .macro  hal_mon_init
119
        la      a0,__default_interrupt_vsr
120
        la      a1,__default_exception_vsr
121
        la      a3,hal_vsr_table
122
 
123
        sw      a0,0(a3)
124
        sw      a1,1*4(a3)
125
        sw      a1,2*4(a3)
126
        sw      a1,3*4(a3)
127
        sw      a1,4*4(a3)
128
        sw      a1,5*4(a3)
129
        sw      a1,6*4(a3)
130
        sw      a1,7*4(a3)
131
        sw      a1,8*4(a3)
132
        sw      a1,9*4(a3)
133
        sw      a1,10*4(a3)
134
        sw      a1,11*4(a3)
135
        sw      a1,12*4(a3)
136
        sw      a1,13*4(a3)
137
        sw      a1,14*4(a3)
138
        sw      a1,15*4(a3)
139
 
140
        sw      a1,32*4(a3)
141
        sw      a1,33*4(a3)
142
        .endm
143
 
144
#elif defined(CYG_HAL_STARTUP_RAM) && defined(CYGSEM_HAL_USE_ROM_MONITOR)
145
 
146
        # Initialize the VSR table entries
147
        # We only take control of the interrupt vector,
148
        # the rest are left to the ROM for now...
149
 
150
        .macro  hal_mon_init
151
        la      a0,__default_interrupt_vsr
152
        la      a3,hal_vsr_table
153
        sw      a0,0(a3)
154
        .endm
155
 
156
#else
157
 
158
        .macro  hal_mon_init
159
        .endm
160
 
161
#endif
162
 
163
 
164
#define CYGPKG_HAL_MIPS_MON_DEFINED
165
 
166
#endif
167
 
168
#------------------------------------------------------------------------------
169
# Decide whether the VSR table is defined externally, or is to be defined
170
# here.
171
 
172
#if defined(CYGPKG_HAL_MIPS_SIM) ||        \
173
    ( defined(CYGPKG_HAL_MIPS_ATLAS) &&    \
174
      defined(CYG_HAL_STARTUP_RAM) &&      \
175
      !defined(CYGSEM_HAL_USE_ROM_MONITOR) \
176
    )
177
 
178
## VSR table defined in linker script
179
 
180
#else
181
 
182
#define CYG_HAL_MIPS_VSR_TABLE_DEFINED
183
 
184
#endif
185
 
186
#------------------------------------------------------------------------------
187
#endif // ifndef CYGONCE_HAL_VARIANT_INC
188
# end of variant.inc

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.